100354PC中文资料仙童半导体数据手册PDF规格书

General Description

The 100354 contains eight D-type edge triggered, master/slave flip-flops with individual inputs (Dn), true outputs (Qn), a clock input (CP), an output enable pin (OEN), and a common clock enable pin (CEN). Data enters the master when CP is LOW and transfers to the slave when CP goes HIGH. When the CEN input goes HIGH it overrides all other inputs, disables the clock, and the Q outputs maintain the last state.

特性 Features

■ Cut-off drivers

■ Drives 25Ω load

■ Low power operation

■ 2000V ESD protection

■ Voltage compensated operating range = −4.2V to −5.7V

■ Available to industrial grade temperature range