Network Synchronization

The ZL30602 offers two  DPLL channels of Synchronous Ethernet (SyncE) packet clock synchronization. Using Microsemi’s fourth generation timing technology, these devices offer one third the jitter of the previous generation devices and have a 40% smaller footprint. Each device integrates all feat Key Features\n• Fully compliant to EEC (G.8262), SEC (G.813), GR-253 SMC and GR-1244 Stratum 3/3E\n• Three programmable ultra-low jitter synthesizers generate any frequency from 0.5 Hz to 900 MHz\n• 6 differential (CML) or 12 single ended (CMOS) ultra-low jitter outputs plus two general purpose CMOS;

Microchip

微芯科技

Package：100-VQFN 双排裸露焊盘；包装：散装 类别：集成电路（IC） 应用特定时钟/定时 描述：DUAL CHANNEL NETWORK SYNCHRONIZE

MICROCHIP

微芯科技

CANopen / DeviceNet Data Single-Ended Cordset

Product Description CANopen / DeviceNet Data Single-Ended Cordset: M12 Standard, male, straight, 5-pin, A-coded, black body, 50 V AC / 60 V DC, 4 A; PUR black cable, 4-wires, Data: 2x0.25 mm² + Power: 2x0.34 mm²

文件：419.6 Kbytes 页数：3 Pages

BELDEN

百通

Single-chip analog TV processor

文件：199.66 Kbytes 页数：7 Pages

STMICROELECTRONICS

意法半导体

MICROWAVE TUNING ELEMENTS

文件：118.97 Kbytes 页数：4 Pages

ETCList of Unclassifed Manufacturers

未分类制造商