T1/E1 System Synchronizer

文件：560.92 Kbytes 页数：34 Pages

ZARLINK

Zarlink Semiconductor Inc

PDH System Synchronizer

The ZL30100 T1/E1 System Synchronizer contains a digital phase-locked loop (DPLL), which provides timing and synchronization for multi-trunk T1 and E1 transmission equipment.The ZL30100 generates ST-BUS and other TDM clock and framing signals that are phase locked to one of two input references. It Supports Telcordia GR-1244-CORE Stratum 4 and Stratum 4E\nSupports ITU-T G.823 and G.824 for 2048 kbps and 1544 kbps interfaces\nSupports ANSI T1.403 and ETSI ETS 300 011 for ISDN primary rate interfaces\nSimple hardware control interface\nAccepts two input references and synchronizes to any combina;

Microchip

微芯科技

T1/E1 System Synchronizer

文件：384.34 Kbytes 页数：36 Pages

ZARLINK

Zarlink Semiconductor Inc

T1/E1 System Synchronizer

文件：384.34 Kbytes 页数：36 Pages

ZARLINK

Zarlink Semiconductor Inc

T1/E1 System Synchronizer

文件：560.92 Kbytes 页数：34 Pages

ZARLINK

Zarlink Semiconductor Inc

T1/E1 System Synchronizer

文件：384.34 Kbytes 页数：36 Pages

ZARLINK

Zarlink Semiconductor Inc

Package：64-TQFP；包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 类别：集成电路（IC） 应用特定时钟/定时 描述：IC SYNCHRONIZER T1/E1 64TQFP

MICROCHIP

微芯科技