TDA4VEN, TDA4AEN Jacinto™ Processors

1 Features Processor Cores: • Up to Quad 64-bit Arm® Cortex®-A53 microprocessor subsystem at up to 1.4GHz – Quad-core Cortex-A53 cluster with 512KB L2 shared cache with SECDED ECC – Each A53 core has 32KB L1 DCache with SECDED ECC and 32KB L1 ICache with Parity protection • Single-core Ar

文件：4.37569 Mbytes 页数：236 Pages

TI

德州仪器

TDA4VEN, TDA4AEN Jacinto™ Processors

1 Features Processor Cores: • Up to Quad 64-bit Arm® Cortex®-A53 microprocessor subsystem at up to 1.4GHz – Quad-core Cortex-A53 cluster with 512KB L2 shared cache with SECDED ECC – Each A53 core has 32KB L1 DCache with SECDED ECC and 32KB L1 ICache with Parity protection • Single-core Ar

文件：4.37703 Mbytes 页数：236 Pages

TI

德州仪器

TDA4VH-Q1, TDA4AH-Q1, TDA4VP-Q1, TDA4AP-Q1 Jacinto™ Processors

1 Features Processor cores: • Up to Four C7x floating point, vector DSP, up to 1.0 GHz, 320 GFLOPS, 1024 GOPS • Up to Four Deep-learning matrix multiply accelerator (MMAv2), up to 32 TOPS (8b) at 1.0 GHz • Two Vision Processing Accelerators (VPAC) with Image Signal Processor (ISP) and mult

文件：5.86476 Mbytes 页数：296 Pages

TI

德州仪器

TDA4VH-Q1, TDA4AH-Q1, TDA4VP-Q1, TDA4AP-Q1 Jacinto™ Processors

1 Features Processor cores: • Up to Four C7x floating point, vector DSP, up to 1.0 GHz, 320 GFLOPS, 1024 GOPS • Up to Four Deep-learning matrix multiply accelerator (MMA), up to 32 TOPS (8b) at 1.0 GHz • TwoVision Processing Accelerators (VPAC) with Image Signal Processor (ISP) and multiple

文件：5.93029 Mbytes 页数：296 Pages

TI

德州仪器

TDA4VH-Q1, TDA4AH-Q1, TDA4VP-Q1, TDA4AP-Q1 Jacinto™ Processors

1 Features Processor cores: • Up to Four C7x floating point, vector DSP, up to 1.0 GHz, 320 GFLOPS, 1024 GOPS • Up to Four Deep-learning matrix multiply accelerator (MMA), up to 32 TOPS (8b) at 1.0 GHz • TwoVision Processing Accelerators (VPAC) with Image Signal Processor (ISP) and multiple

文件：5.93521 Mbytes 页数：297 Pages

TI

德州仪器

TDA4VH-Q1, TDA4AH-Q1, TDA4VP-Q1, TDA4AP-Q1 Jacinto™ Processors

1 Features Processor cores: • Up to Four C7x floating point, vector DSP, up to 1.0 GHz, 320 GFLOPS, 1024 GOPS • Up to Four Deep-learning matrix multiply accelerator (MMA), up to 32 TOPS (8b) at 1.0 GHz • TwoVision Processing Accelerators (VPAC) with Image Signal Processor (ISP) and multiple

文件：5.93521 Mbytes 页数：297 Pages

TI

德州仪器

TDA4VH-Q1, TDA4AH-Q1, TDA4VP-Q1, TDA4AP-Q1 Jacinto™ Processors

1 Features Processor cores: • Up to Four C7x floating point, vector DSP, up to 1.0 GHz, 320 GFLOPS, 1024 GOPS • Up to Four Deep-learning matrix multiply accelerator (MMAv2), up to 32 TOPS (8b) at 1.0 GHz • Two Vision Processing Accelerators (VPAC) with Image Signal Processor (ISP) and mult

文件：5.86476 Mbytes 页数：296 Pages

TI

德州仪器

SoC for Advanced Driver Assistance Systems (ADAS) 17mm Package (CBD Package) Silicon Revision 2.0

文件：4.61828 Mbytes 页数：391 Pages

TI

德州仪器

ADAS Applications Processor 23mm Package (ABZ Package) Silicon Revision 1.0

文件：6.03105 Mbytes 页数：465 Pages

TI

德州仪器

Applications Processor 23mm Package (ABZ Package) Silicon Revision 1.0

文件：6.0009 Mbytes 页数：464 Pages

TI

德州仪器