XRT83VSH316集成电路（IC）的电信规格书PDF中文资料

GENERAL DESCRIPTION

The XRT83VSH316 is a fully integrated 16-channel short-haul line interface unit (LIU) that operates from a 1.8V Inner Core and 3.3V I/O power supplies. Using internal termination, the LIU provides one bill of materials to operate in T1, E1, or J1 mode independently on a per channel basis with minimum external components. The LIU features are programmed through a standard parallel microprocessor interface or SPI (Serial Mode).

FEATURES

• Fully integrated 16-Channel short haul transceivers for T1/J1 (1.544MHz) and E1 (2.048MHz) applications

• Parallel or SPI Microprocessor Interface

• T1/E1/J1 short haul and clock rate are per port selectable through software without changing components

• Internal Impedance matching on both receive and transmit for 75 (E1), 100 (T1), 110 (J1), and 120 (E1) applications are per port selectable through software without changing components

• Power down on a per channel basis with independent receive and transmit selection

• Five pre-programmed transmit pulse settings for T1 short haul applications per channel

• User programable Arbitrary Pulse mode for T1 and E1

• On-Chip transmit short-circuit protection and limiting protects line drivers from damage on a per channel basis

• Crystal-Less digital jitter attenuators (JA) with 32-Bit or 64-Bit FIFO for the receive or transmit path per channel

• Driver failure monitor output (DMO) alerts of possible system or external component problems

• Transmit outputs and receive inputs may be High impedance for protection or redundancy applications on a per channel basis

• Support for automatic protection switching

• 1:1 and 1+1 protection without relays

• Receive monitor mode handles 0 to 6dB resistive attenuation (flat loss) along with 0 to 6dB cable loss for both T1 and E1

• Loss of signal (LOS) according to ITU-T G.775/ETS300233 (E1) and ANSI T1.403 (T1/J1) for system (SLOS) and line (RLOS) side diagnostics

• Programmable data stream muting upon RLOS detection

• On-Chip HDB3/B8ZS encoder/decoder with an internal 16-bit LCV counter for each channel

• On-Chip digital clock recovery circuit for high input jitter tolerance

• QRSS/PRBS pattern generator and detection for testing and monitoring for system (SPRBS) and line (PRBS) side diagnostics

• Error and bipolar violation insertion and detection

APPLICATIONS

• T1 Digital Cross Connects (DSX-1)

• ISDN Primary Rate Interface

• CSU/DSU E1/T1/J1 Interface

• T1/E1/J1 LAN/WAN Routers

• Public Switching Systems and PBX Interfaces

• T1/E1/J1 Multiplexer and Channel Banks

• Integrated Multi-Service Access Platforms (IMAPs)

• Integrated Access Devices (IADs)

• Inverse Multiplexing for ATM (IMA)

• Wireless Base Stations