XRT8001ID规格书库存现货艾科嘉EXAR-114ic电子网

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型号	下载订购	功能描述	制造商上传企业	LOGO
XRT8001ID	文件：1.05492 Mbytes Page：48 Pages	WAN Clock for T1 and E1 Systems GENERAL DESCRIPTION The XRT8001 WAN Clock is a dual-phase-locked loop chip that generates two very low jitter output clock signals that can be used for synchronization clocks in wide area networking systems. The XRT8001 has preprogrammed multipliers and dividers that are selected via the serial p 文件：1.05492 Mbytes 页数：48 Pages	EXAR 艾科嘉	EXAR
XRT8001IP	文件：1.05492 Mbytes Page：48 Pages	WAN Clock for T1 and E1 Systems GENERAL DESCRIPTION The XRT8001 WAN Clock is a dual-phase-locked loop chip that generates two very low jitter output clock signals that can be used for synchronization clocks in wide area networking systems. The XRT8001 has preprogrammed multipliers and dividers that are selected via the serial p 文件：1.05492 Mbytes 页数：48 Pages	EXAR 艾科嘉	EXAR
Z8001	文件：2.62608 Mbytes Page：40 Pages	CPU Central Processing Unit 文件：2.62608 Mbytes 页数：40 Pages	ZILOG	ZILOG
Z8001SEGCPU	文件：4.89371 Mbytes Page：82 Pages	CENTRAL PROCESSING UNIT 文件：4.89371 Mbytes 页数：82 Pages	STMICROELECTRONICS 意法半导体	STMICROELECTRONICS

更多XRT8001ID供应商更新时间2026-1-20 14:02:00