XRT79L71IB集成电路（IC）的电信规格书PDF中文资料

GENERAL DESCRIPTION

The XRT79L71 is a single channel, integrated DS3/E3 framing controller and Line Interface Unit with Jitter Attenuator that is designed to support Frame processing. For Clear-Channel Framer applications, this device supports the transmission and reception of “user data” via the DS3/E3 payload.

The XRT79L71 includes DS3/E3 Framing, Line Interface Unit with Jitter Attenuator that supports mapping of HDLC framed data. A flexible parallel microprocessor interface is provided for configuration and control.

GENERAL FEATURES:

● Integrated T3/E3 Line Interface Unit

● Integrated Jitter Attenuator that can be selected

either in Receive or Transmit path

● HDLC Controller that provides the mapping/

extraction of either bit or byte mapped

encapsulated packet from DS3/E3 Frame.

● Contains on-chip 16 cell FIFO (configurable in

depths of 4, 8, 12 or 16 cells), in both the Transmit

(TxFIFO) and Receive Directions (RxFIFO)

● Contains on-chip 54 byte Transmit and Receive

OAM Cell Buffer for transmission, reception and

processing of OAM Cells

● Supports M13 and C-Bit Parity Framing Formats

● Supports DS3/E3 Clear-Channel Framing.

● Includes PRBS Generator and Receiver

● Supports Line, Cell, and PLCP Loop-backs

● Interfaces to 8 Bit wide Intel, Motorola, PowerPC,

and Mips µPs

● Low power 3.3V, 5V Input Tolerant, CMOS

● Available in 208 STBGA Package

● JTAG Interface (Continue ...)

APPLICATIONS

● Digital Access and Cross Connect Systems

● 3G Base Stations

● DSLAMs