XRT73L02M集成电路（IC）的电信规格书PDF中文资料

GENERAL DESCRIPTION

The XRT73L02M is a two-channel fully integrated Line Interface Unit (LIU) for E3/DS3/STS-1 applications. It incorporates independent Receivers, Transmitters in a single 100 pin TQFP package.

FEATURES

RECEIVER:

• On chip Clock and Data Recovery circuit for high input jitter tolerance.

• Meets the jitter tolerance requirements as specified in ITU-T G.823_1993 for E3 and Telcordia GR-499-CORE for DS3 applications.

• Detects and Clears LOS as per G.775.

• Receiver Monitor mode handles up to 20 dB flat loss with 6 dB cable attenuation.

• On chip B3ZS/HDB3 encoder and decoder that can either be enabled or disabled.

• On-chip clock synthesizer generates the appropriate rate clock from a single frequency XTAL.

• Provides low jitter clock outputs for either DS3,E3 or STS-1 rates.

• On-chip clock synthesizer provides the appropriate rate clock from a single 12.288 MHz Clock.

• Provides low jitter output clock.

APPLICATIONS

• E3/DS3 Access Equipment.

• STS1-SPE to DS3 Mapper.

• DSLAMs.

• Digital Cross Connect Systems.

• CSU/DSU Equipment.

• Routers.

• Fiber Optic Terminals.