2.97V TO 5.5V DUAL UART WITH 128-BYTE FIFOS

文件：891.77 Kbytes 页数：51 Pages

EXAR

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3.3V AND 5V DUART WITH 128-BYTE FIFO

文件：611.89 Kbytes 页数：43 Pages

EXAR

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Dual UART with TX and RX FIFO Counters, 128-Bytes FIFO and Automatic RS-485 Half Duplex Control

The XR16C2850 (2850) is an enhanced dual universal asynchronous receiver and transmitter (UART). Enhanced features include 128 bytes of TX and RX FIFOs, programmable TX and RX FIFO trigger level, FIFO level counters, automatic (RTS/CTS) hardware and (Xon/Xoff) software flow control, automatic RS-485 ·Added feature in devices with a top mark date code of \"F2 YYWW\" and newer:·5V tolerant inputs·0 ns address hold time (TAH)\n·Pin-to-pin compatible and functionally compatible to Exar’s ST16C2550 and XR16L2750 and TI’s TL16C752B in the 48-TQFP package·Pin-alike Exar’s XR16L2750 and ST16C2550 48-TQ;

MaxLinear

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2.97V TO 5.5V DUAL UART WITH 128-BYTE FIFOS

文件：891.77 Kbytes 页数：51 Pages

EXAR

艾科嘉

2.97V TO 5.5V DUAL UART WITH 128-BYTE FIFOS

文件：891.77 Kbytes 页数：51 Pages

EXAR

艾科嘉

DUAL UART WITH 128-byte FIFO?셲 AND RS-485 HALF DUPLEX CONTROL

文件：728.41 Kbytes 页数：44 Pages

EXAR

艾科嘉

3.3V AND 5V DUART WITH 128-BYTE FIFO

文件：611.89 Kbytes 页数：43 Pages

EXAR

艾科嘉

DUAL UART WITH 128-byte FIFO?셲 AND RS-485 HALF DUPLEX CONTROL

文件：728.41 Kbytes 页数：44 Pages

EXAR

艾科嘉

2.97V TO 5.5V DUAL UART WITH 128-BYTE FIFOS

文件：891.77 Kbytes 页数：51 Pages

EXAR

艾科嘉

3.3V AND 5V DUART WITH 128-BYTE FIFO

文件：611.89 Kbytes 页数：43 Pages

EXAR

艾科嘉