WT5082中文资料伟诠数据手册PDF规格书

DESCRIPTION

The WT5082 is a high-performance, low-cost, CMOS 8-bit single-chip micro-controller with POCSAG decoder、 12KB SRAM、 296KB ROM and 56x32/56x33 dot-matrix LCD driver embedded, which is suitable for information paging applications, especially when large number of LCD dots and large ROM and SRAM space are needed, such as Chinese character display pagers.

This chip has 8-bit CPU, RAM, ROM, I/Os, two timers/counters, interrupt controller, LCD driver and watchdog timer. To be suitable for portable battery-powered applications, a power saving function is included.

FEATURES

◆ POCSAG pager code decoder

◇ Single crystal support 512, 1200 and 2400 baud rates ( 76.8kHz crystal )

◇ Support 6 RICs addresses and 6 independent frame numbers

◇ Support partial address match facility for address F (up to 260k addresses are provided)

◇ 3 RF control lines (PLL, quick charge and enable)

◇ Build in data filter (16-times over-sampling) and data bit clock recovery

◇ Interrupt 6502 CPU when there are any status change

◇ DMA or interrupt mode to send the received message data to CPU

◆ 8-bit single chip Microcontroller with 56x32/56x33 LCD driver

◆ 12Kbytes SRAM (~2K bits for LCD display SRAM), 256 Kbytes character pattern ROM, 32Kbytes program ROM and 8Kbytes ROM for test program

◆ Wide voltage operating range from 2.5 V to 3.6 V

◆ Built-in Ring Oscillator with maximum frequency up to 2.0 MHz

◆ I/O port (21 pins)

。 Input port 8 pins

。 Input/output port 13 pins

◆ Watchdog Timer

◆ Operating current 1mA/1MHz@3V; providing standby mode and key wake-up mode

◇ Ring OSC OFF and 76.8KHz X’tal OSC ON: current consumption < 85 uA @3V

◆ Dual timer/counters

◆ 7-bit EPI (external port interrupt) for key wake-up interrupt

◆ 1-bit EPI (external port interrupt to 6502 NMI) for battery remove detect

◆ SIO for flex decoder (32bit)

◆ UART(10 bits)

◆ One PWM signal function

◆ 2.2V threshold automatic power on reset

◆ 2.0V low power reset

◆ Package: Chip form or 128-pin LQFP (14mm x 14mm x 1.4mm)