Double Data Rate architecture: two data transfers per clock cycle

GENERAL DESCRIPTION The W631GG6KB is a 1G bits DDR3 SDRAM, organized as 8,388,608 words x 8 banks x 16 bits. This device achieves high speed transfer rates up to 1866 Mb/sec/pin (DDR3-1866) for various applications. W631GG6KB is sorted into the following speed grades: -11, -12, 12I, 12A, 12K -1

文件：3.6109 Mbytes 页数：158 Pages

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华邦电子

Double Data Rate architecture: two data transfers per clock cycle

GENERAL DESCRIPTION The W631GG6KB is a 1G bits DDR3 SDRAM, organized as 8,388,608 words x 8 banks x 16 bits. This device achieves high speed transfer rates up to 1866 Mb/sec/pin (DDR3-1866) for various applications. W631GG6KB is sorted into the following speed grades: -11, -12, 12I, 12A, 12K -1

文件：3.6109 Mbytes 页数：158 Pages

WINBOND

华邦电子

Double Data Rate architecture: two data transfers per clock cycle

GENERAL DESCRIPTION The W631GG6KB is a 1G bits DDR3 SDRAM, organized as 8,388,608 words x 8 banks x 16 bits. This device achieves high speed transfer rates up to 1866 Mb/sec/pin (DDR3-1866) for various applications. W631GG6KB is sorted into the following speed grades: -11, -12, 12I, 12A, 12K -1

文件：3.6109 Mbytes 页数：158 Pages

WINBOND

华邦电子

Double Data Rate architecture: two data transfers per clock cycle

GENERAL DESCRIPTION The W631GG6KB is a 1G bits DDR3 SDRAM, organized as 8,388,608 words x 8 banks x 16 bits. This device achieves high speed transfer rates up to 1866 Mb/sec/pin (DDR3-1866) for various applications. W631GG6KB is sorted into the following speed grades: -11, -12, 12I, 12A, 12K -1

文件：3.6109 Mbytes 页数：158 Pages

WINBOND

华邦电子

Double Data Rate architecture: two data transfers per clock cycle

GENERAL DESCRIPTION The W631GG6KB is a 1G bits DDR3 SDRAM, organized as 8,388,608 words x 8 banks x 16 bits. This device achieves high speed transfer rates up to 1866 Mb/sec/pin (DDR3-1866) for various applications. W631GG6KB is sorted into the following speed grades: -11, -12, 12I, 12A, 12K -1

文件：3.6109 Mbytes 页数：158 Pages

WINBOND

华邦电子

Double Data Rate architecture: two data transfers per clock cycle

GENERAL DESCRIPTION The W631GG6KB is a 1G bits DDR3 SDRAM, organized as 8,388,608 words x 8 banks x 16 bits. This device achieves high speed transfer rates up to 1866 Mb/sec/pin (DDR3-1866) for various applications. W631GG6KB is sorted into the following speed grades: -11, -12, 12I, 12A, 12K -1

文件：3.6109 Mbytes 页数：158 Pages

WINBOND

华邦电子

Double Data Rate architecture: two data transfers per clock cycle

GENERAL DESCRIPTION The W631GG6KB is a 1G bits DDR3 SDRAM, organized as 8,388,608 words x 8 banks x 16 bits. This device achieves high speed transfer rates up to 1866 Mb/sec/pin (DDR3-1866) for various applications. W631GG6KB is sorted into the following speed grades: -11, -12, 12I, 12A, 12K -1

文件：3.6109 Mbytes 页数：158 Pages

WINBOND

华邦电子

Double Data Rate architecture: two data transfers per clock cycle

GENERAL DESCRIPTION The W631GG6KB is a 1G bits DDR3 SDRAM, organized as 8,388,608 words x 8 banks x 16 bits. This device achieves high speed transfer rates up to 1866 Mb/sec/pin (DDR3-1866) for various applications. W631GG6KB is sorted into the following speed grades: -11, -12, 12I, 12A, 12K -1

文件：3.6109 Mbytes 页数：158 Pages

WINBOND

华邦电子

Double Data Rate architecture: two data transfers per clock cycle

GENERAL DESCRIPTION The W631GG6KB is a 1G bits DDR3 SDRAM, organized as 8,388,608 words x 8 banks x 16 bits. This device achieves high speed transfer rates up to 1866 Mb/sec/pin (DDR3-1866) for various applications. W631GG6KB is sorted into the following speed grades: -11, -12, 12I, 12A, 12K -1

文件：3.6109 Mbytes 页数：158 Pages

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华邦电子

双倍数据传输速率同步动态随机存取内存-3rd generation(第三代)

The W631GG6KB is a 1G bits DDR3 SDRAM and speed involving -11, 11I, -12, 12I, 12J, -15, 15I and 15J •Power Supply: VDD, VDDQ = 1.5 V ± 0.075 V \n• Eight internal banks for concurrent operation \n• CAS Latency: 6, 7, 8, 9,10,11 and 13 \n• Programmable read burst ordering: interleaved or nibble sequential \n• Edge-aligned with Read data and center-aligned with Write data \n• Differential clock input;

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华邦电子