W29C040P-12B中文资料512K ´8 CMOS FLASH MEMORY数据手册Winbond规格书

描述 Description

GENERAL DESCRIPTION
The W29C040 is a 4-megabit, 5-volt only CMOS page mode EEPROM organized as 512K  ´8 bits. The device can be written (erased and programmed) in-system with a standard 5V power supply. A 12-volt VPPis not required. The unique cell architecture of the W29C040 results in fast write (erase/program) operations with extremely low current consumption compared to other comparable 5-volt flash memory products. The device can also be written (erased and programmed) by using standard EPROM programmers.FEATURES
· Single 5-volt write (erase and program) operations
· Fast page-write operations
- 256 bytes per page
- Page write (erase/program) cycle: 5 mS (typ.)
- Effective byte-write (erase/program) cycle time: 19.5 mS
- Optional software-protected data write
· Fast chip-erase operation: 50 mS
· Two 16 KB boot blocks with lockout
· Typical page write (erase/program) cycles: 1K/10K (typ.)
· Read access time: 90/120 nS
· Ten-year data retention
· Software and hardware data protection
· Low power consumption
- Active current: 25 mA (typ.)
- Standby current: 20 mA (typ.)
· Automatic write (erase/program) timing with internal VPP generation
· End of write (erase/program) detection
- Toggle bit
- Data polling
· Latched address and data
· All inputs and outputs directly TTL compatible
· JEDEC standard byte-wide pinouts
· Available packages: TSOP and PLCC

特性 Features

· Single 5-volt write (erase and program) operations
· Fast page-write operations
- 256 bytes per page
- Page write (erase/program) cycle: 5 mS (typ.)
- Effective byte-write (erase/program) cycle time: 19.5 mS
- Optional software-protected data write
· Fast chip-erase operation: 50 mS
· Two 16 KB boot blocks with lockout
· Typical page write (erase/program) cycles: 1K/10K (typ.)
· Read access time: 90/120 nS
· Ten-year data retention
· Software and hardware data protection
· Low power consumption
- Active current: 25 mA (typ.)
- Standby current: 20 mA (typ.)
· Automatic write (erase/program) timing with internal VPP generation
· End of write (erase/program) detection
- Toggle bit
- Data polling
· Latched address and data
· All inputs and outputs directly TTL compatible
· JEDEC standard byte-wide pinouts
· Available packages: TSOP and PLCC