W173中文资料芯科科技数据手册PDF规格书

Functional Description

The W173 has been defined to meet the timing signal require ments for Hewlett Packard CPB tape drive system.

特性 Features

• Four derived outputs at frequencies specified by Hewlett Packard Computer Peripherals Bristol/Boise(CPB)

• Less than ±250 ps cycle-to-cycle jitter (13.2 MHz clock excluded derated to ±400 ps)

• Less than ±350 ps absolute jitter

• Supports 3.3V operation

• TTL compatible logic: VIL = 0.8V max., VIH = 2.0V min.,VOL = 0.4V max., and VOH = 2.4V min.

• OE pin has internal pull-up

• 45/55 duty cycle on all outputs

• 15 output drivers

• Accepts 26.5625 MHz input reference

• Built-in crystal oscillator circuit. Capacitive load presented to the crystal is approximately 14 pF

• Outputs designed to drive 30 pF loads

• Available in 16-pin SOIC package