VSC7124中文资料VITESSE数据手册PDF规格书

General Description

The VSC7124 contains five cascaded Port Bypass Circuits (PBCs) used to steer serial signals. This part is typically used in distributing Fibre Channel signals to an array of disk drives in an FC-AL loop as illustrated in Figure 1. The VSC7124 can be used with any of the Vitesse JBOD circuits to implement FC-AL JBODs of virtually any size. In Figure 1, the first VSC7127’s CRU is configured as a Repeater to attenuate jitter. The VSC7124 does not contain a CRU in order to reduce power and cost. The second VSC7127’s CRU is configured as a retimer so that the output of the device is a jitter compliance point. Each PBC is a multiplexer that is controlled by the corresponding SELx line which, if HIGH, selects the external input or, if LOW, selects the output of the previous PBC.

特性 Features

• ANSI X3T11 Fibre Channel Compliant at 1.0625Gb/s

• IEEE 802.3z Gigabit Ethernet Compliant at 1.25Gb/s

• Five Port Bypass Circuits (PBCs)

• On-Chip Transmit Termination

• 3.3V, 0.25W Typical Power

• 0.35um CMOS, a Velocity Family Member

• 44-Pin, 10mm PQFP Package