首页>V62SLASH23620-01XE>规格书详情

V62SLASH23620-01XE中文资料德州仪器数据手册PDF规格书

PDF无图
厂商型号

V62SLASH23620-01XE

功能描述

SN54SC4T08-SEP Radiation-Tolerant, 1.2-V to 5.5-V, Quadruple 2-Input Positive-AND Gates With Integrated Translation

丝印标识

SC08SEP

封装外壳

TSSOP

文件大小

1.030589 Mbytes

页面数量

26

生产厂商

TI

中文名称

德州仪器

网址

网址

数据手册

下载地址一下载地址二到原厂下载

更新时间

2025-12-21 23:01:00

人工找货

V62SLASH23620-01XE价格和库存,欢迎联系客服免费人工找货

V62SLASH23620-01XE规格书详情

1 Features

• Vendor item drawing available, VID V62/23620

• Total ionizing dose characterized at 30 krad(Si)

– Total ionizing dose characterized radiation lot

acceptance testing (TID RLAT) for every wafer

lot to 30 krad(Si)

• Single-event effects (SEE) characterized:

– Single event latch-up (SEL) immune to linear

energy transfer (LET) = 43 MeV-cm2 /mg

– Single event transient (SET) characterized to

43 MeV-cm2 /mg

• Wide operating range of 1.2 V to 5.5 V

• Single-supply translating gates at

5/3.3/2.5/1.8/1.2 V VCC

– TTL compatible inputs:

• Up translation:

– 1.8-V – Inputs from 1.2 V

– 2.5-V – Inputs from 1.8 V

– 3.3-V – Inputs from 1.8 V, 2.5 V

– 5.0-V – Inputs from 2.5 V, 3.3 V

• Down translation:

– 1.2-V – Inputs from 1.8 V, 2.5 V, 3.3 V,

5.0 V

– 1.8-V – Inputs from 2.5 V, 3.3 V, 5.0 V

– 2.5-V – Inputs from 3.3 V, 5.0 V

– 3.3-V – Inputs from 5.0 V

• 5.5 V tolerant input pins

• Output drive up to 25 mA at 5-V

• Latch-up performance exceeds 250 mA per

JESD 17

• Space enhanced plastic (SEP)

– Controlled baseline

– Gold bondwire

– NiPdAu lead finish

– One assembly and test site

– One fabrication site

– Military (–55°C to 125°C) temperature range

– Extended product life cycle

– Extended product-change notification (PCN)

– Product traceability

– Meets NASAs ASTM E595 outgassing

specification

2 Applications

• Enable or disable a digital signal

• Controlling an indicator LED

• Translation between communication modules and

system controllers

3 Description

The SN54SC4T08-SEP contains four independent 2-

input AND Gates . Each gate performs the Boolean

function Y = A × B in positive logic. The output level

is referenced to the supply voltage (VCC) and supports

1.2-V, 1.8-V, 2.5-V, 3.3-V, and 5-V CMOS levels.

The input is designed with a lower threshold circuit to

support up translation for lower voltage CMOS inputs

(for example 1.2 V input to 1.8 V output or 1.8 V input

to 3.3 V output). Additionally, the 5-V tolerant input

pins enable down translation (for example, 3.3 V to

2.5 V output).

供应商 型号 品牌 批号 封装 库存 备注 价格
UEM
24+
NA/
5250
原装现货,当天可交货,原型号开票
询价
VANGO
17+
QFN68
880000
明嘉莱只做原装正品现货
询价
25+
45
公司优势库存 热卖中!
询价
24+
SOT23-5L
8500
询价
ST
23+
TO-223
16900
正规渠道,只有原装!
询价
17+
SOT-223
6200
100%原装正品现货
询价
N/A
2450+
QFN
6540
只做原装正品假一赔十为客户做到零风险!!
询价
UEM
2223+
SOT-223
26800
只做原装正品假一赔十为客户做到零风险
询价
2022+
TO-223
10000
原厂代理 终端免费提供样品
询价
ST
2511
TO-223
16900
电子元器件采购降本30%!原厂直采,砍掉中间差价
询价