V62SLASH04683-01XE中文资料德州仪器数据手册PDF规格书

Controlled Baseline

− One Assembly/Test Site, One Fabrication

Site

Extended Temperature Performance of

−40°C to 125°C

Enhanced Diminishing Manufacturing

Sources (DMS) Support

Enhanced Product-Change Notification

Qualification Pedigree†

ESD Protection Exceeds 2000 V Per

MIL-STD-883, Method 3015; Exceeds 200 V

Using Machine Model (C = 200 pF, R = 0)

Inputs Are TTL-Voltage Compatible

description/ordering information

The SN74AHCT125 is a quadruple bus buffer gate featuring independent line drivers with 3-state outputs. Each

output is disabled when the associated output-enable (OE) input is high. When OE is low, the respective gate

passes the data from the A input to its Y output.

To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup

resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.