128K X 8 STATIC RAM

Description The V62C5181024 is a 1,048,576-bit random-access memory organized as 131,072 words by 8 bits. It is built with MOSEL VITELICs high performance CMOS process. Inputs and tree-state outputs are TTL compatible and allow for circuit interfacing with common system bus structures. Features

文件：59.55 Kbytes 页数：12 Pages

MOSEL

茂矽电子

128K X 8 STATIC RAM

Description The V62C5181024 is a 1,048,576-bit random-access memory organized as 131,072 words by 8 bits. It is built with MOSEL VITELICs high performance CMOS process. Inputs and tree-state outputs are TTL compatible and allow for circuit interfacing with common system bus structures. Features

文件：59.55 Kbytes 页数：12 Pages

MOSEL

茂矽电子

2M x 32 SDRAM 512K x 32bit x 4 Banks Synchronous DRAM LVTTL

GENERAL DESCRIPTION The K4S643232C is 67,108,864 bits synchronous high data rate Dynamic RAM organized as 4 x 524,288 words by 32 bits, fabricated with SAMSUNG¢s high performance CMOS technology. Synchronous design allows precise cycle control with the use of system clock. I/O transactions are po

文件：1.1559 Mbytes 页数：43 Pages

Samsung

三星

128K X 8 STATIC RAM

Description The V62C5181024 is a 1,048,576-bit random-access memory organized as 131,072 words by 8 bits. It is built with MOSEL VITELICs high performance CMOS process. Inputs and tree-state outputs are TTL compatible and allow for circuit interfacing with common system bus structures. Features

文件：59.55 Kbytes 页数：12 Pages

MOSEL

茂矽电子