4M X 4 EDO PAGE MODE CMOS DYNAMIC RAM

Description The V53C517405A is a 4,194,304 x 4 bit high performance CMOS dynamic random access memory. The V53C517405A offers Page mode operation with Extended Data Output. The V53C517405A has a symmetric address, 11-bit row and 11-bit column. All inputs are TTL compatible. EDO Page Mode ope

文件：170.83 Kbytes 页数：24 Pages

MOSEL

茂矽电子

4M X 4 EDO PAGE MODE CMOS DYNAMIC RAM

Description The V53C517405A is a 4,194,304 x 4 bit high performance CMOS dynamic random access memory. The V53C517405A offers Page mode operation with Extended Data Output. The V53C517405A has a symmetric address, 11-bit row and 11-bit column. All inputs are TTL compatible. EDO Page Mode ope

文件：170.83 Kbytes 页数：24 Pages

MOSEL

茂矽电子

4M X 4 EDO PAGE MODE CMOS DYNAMIC RAM

Description The V53C517405A is a 4,194,304 x 4 bit high performance CMOS dynamic random access memory. The V53C517405A offers Page mode operation with Extended Data Output. The V53C517405A has a symmetric address, 11-bit row and 11-bit column. All inputs are TTL compatible. EDO Page Mode ope

文件：170.83 Kbytes 页数：24 Pages

MOSEL

茂矽电子

4M X 4 EDO PAGE MODE CMOS DYNAMIC RAM

Description\nThe V53C517405A is a 4,194,304 x 4 bit high performance CMOS dynamic random access memory. The V53C517405A offers Page mode operation with Extended Data Output. The V53C517405A has a symmetric address, 11-bit row and 11-bit column.\nAll inputs are TTL compatible. EDO Page Mode operation ■ 4M x 4-bit organization\n■ EDO Page Mode for a sustained data rate of 50 MHz\n■ RAS access time: 50, 60, 70 ns\n■ Low power dissipation\n■ Read-Modify-Write, RAS-Only Refresh, CAS-Before-RAS Refresh, Hidden Refresh\n■ Refresh Interval: 2048 cycles/32 ms\n■ Available in 24/26-pin 300 mil SOJ, and 2;

Mosel

茂矽电子

4M x 4 EDO page mode CMOS DRAM, 50ns

Mosel

茂矽电子