V386数据手册Renesas中文资料规格书

描述 Description

General Description
The V386 is an ideal LVDS receiver that converts 4-pair LVDS data streams into parallel 28 bits of CMOS/TTL data with bandwidth up to 2.38 Gbps throughput or 297.5 Mbytes per second.
This chip is an ideal means to solve EMI and cable size problems associated with wide, high-speed TTL interfaces through very low-swing LVDS signals.
ICS manufactures a large variety of video application devices. Consult ICS for all of your video application requirements.

特性 Features

• Pin and function compatible with the National DS90CF386, THine THC63LVDF84, TI SN65LVDS94
• Converts 4-pair LVDS data streams into parallel 28 bits of CMOS/TTL data
• Fully spread spectrum compatible
• Wide clock frequency range from 20 MHz to 85 MHz
• Supports VGA, SVGA, XGA, and SXGA
• LVDS voltage swing of 350 mV for low EMI
• On-chip PLL requires no external components
• Low-power CMOS design
• Falling edge clock triggered outputs
• Power-down control function
• Compatible with TIA/EIA-644 LVDS standards
• Packaged in a 56-pin TSSOP (Pb free available)