UPSD3422_V01中文资料意法半导体数据手册PDF规格书

特性 Features

■ Fast 8-bit Turbo 8032 MCU, 40 MHz

– Advanced core, 4-clocks per instruction

– 10 MIPs peak performance at 40 MHz (5 V)

– JTAG debug and in-system programming

– 16-bit internal instruction path fetches

double-byte instruction in a single memory

cycle

– Branch cache & 4 instruction prefetch

queue

– Dual XDATA pointers with automatic

increment and decrement

– Compatible with 3rd party 8051 tools

■ Dual Flash memories with memory

management

– Place either memory into 8032 program

address space or data address space

– READ-while-WRITE operation for inapplication programming and EEPROM

emulation

– Single voltage program and erase

– 100 000 guaranteed erase cycles, 15-year

retention

■ Clock, reset, and power supply management

– Flexible 8-level CPU clock divider register

– Normal, Idle, and power-down modes

– Power-on-reset and low-voltage-reset

supervisor

– Programmable watchdog timer

■ Programmable logic, general purpose

– 16 macrocells for logic applications (e.g.,

shifters, state machines, chip-selects, gluelogic to keypads, and LCDs)

■ A/D converter

– Eight channels, 10-bit resolution, 6 µs

■ Operating voltage source (±10)

– 5 V devices: 5.0 V and 3.3 V sources

– 3.3 V devices: 3.3 V source

■ Communication interfaces

– USB v2.0 Full Speed (12Mbps)

– 10 endpoint pairs (In/Out), each endpoint

with 64-byte FIFO (supports Control, Intr,

and Bulk transfer types)

– I2C Master/Slave controller, 833kHz

– SPI Master controller, 10MHz

– Two UARTs with independent baud rate

– IrDA potocol: up to 115 kbaud

– Up to 46 I/O, 5 V tolerant uPSD34xxV

■ Timers and interrupts

– Three 8032 standard 16-bit timers

– Programmable counter array (PCA), six 16-

bit modules for PWM, CAPCOM, and

timers

– 8/10/16-bit PWM operation

– 12 Interrupt sources with two external

interrupt pins

■ Packages

– ECOPACK® compliant