UPD98401A中文资料瑞萨数据手册PDF规格书

FEATURES

• Conforms to ATM Forum

• AAL-5 SAR sublayer and ATM layer functions

• Hardware support of AAL-5 processing

• Processing of non-AAL-5 traffic (AAL-3/4 cell, OAM cell, RM cell) by software with raw cell processing function

• Hardware support of comparison/generation of CRC-10 for non-AAL-5 traffic

• Supports up to 32K virtual channels (VC)

• Provided with 16 traffic shapers that carry out transmission scheduling (control of average rate/peak rate) so as to

set different transmission rate for each VC

• Interface and commands for controlling PHY device

• Employs “UTOPIA interface” as cell data interface with PHY device

- Octet-level handshake

- Cell-level handshake

• 32-bit general-purpose bus interface

• High-speed DMAC (supports 1-, 2-, 4-, 8-, 12-, and 16-word burst)

• JTAG boundary scan test function (IEEE1149.1)

• CMOS technology

• +5 V single power source