UPD70F3015B中文资料V850/SA1™ 32-BIT SINGLE-CHIP MICROCONTROLLER数据手册Renesas规格书

描述 Description

DESCRIPTION
The µPD70F3015B, 70F3015BY, 70F3017A, and 70F3017AY are products with on-chip flash memory. Because the devices can be programmed by the user on-board, they are ideal for the evaluation stages of system development, small-scale production of a variety of products, and rapid development of new products.
The V850/SA1 provides a high-level cost performance ideal for applications ranging from low-power camcorders and other AV equipment to portable telephone equipment such as cellular phones and personal handyphone systems (PHS).FEATURES
○ Number of instructions: 74
○ Minimum instruction execution time:
   58.8 ns (@ 17 MHz operation with main system clock (fXX))
   50 ns (@ 20 MHz operation with main system clock (fXX))
   30.5 µs (@ 32.768 kHz operation with subsystem clock (fXT))
○ General-purpose registers: 32 bits × 32 registers
○ Instruction set:
   Signed multiplication, saturation operations, 32-bit shift instructions, bit manipulation instructions, load/store instructions
○ Memory space:
   16 MB linear address space
   Memory block division function: 2 MB per block
○ Internal memory
• Flash memory
   128 KB (µPD70F3015B, 70F3015BY)
   256 KB (µPD70F3017A, 70F3017AY)
• RAM
   4 KB (µPD70F3015B, 70F3015BY)
   8 KB (µPD70F3017A, 70F3017AY)
○ External bus interface: 16-bit data bus
   Address bus: Separate output enabled
○ Interrupts and exceptions
   External: 8, internal: 23, exceptions: 1
○ I/O lines Total: 85
○ Timer/counters
   16-bit timer: 2 channels
   8-bit timer: 4 channels
○ Watch timer: 1 channel
○ Watchdog timer: 1 channel
○ Serial interface (SIO)
   Asynchronous serial interface (UART)
   Clocked serial interface (CSI)
   I2C bus interface (µPD70F3015BY, 70F3017AY)
○ A/D converter: 12 channels
○ DMA controller: 3 channels
○ RTP: 8 bits × 1 channel or 4 bits × 2 channels
○ Power-saving functions: HALT/IDLE/STOP modes
○ Packages: 100-pin plastic LQFP (14 × 14 mm)
                121-pin plastic FBGA (12 × 12 mm)
    
APPLICATIONS
○ Low-power portable devices Cellular phones, PHSs, and camcorders

特性 Features

○ Number of instructions: 74
○ Minimum instruction execution time:
   58.8 ns (@ 17 MHz operation with main system clock (fXX))
   50 ns (@ 20 MHz operation with main system clock (fXX))
   30.5 µs (@ 32.768 kHz operation with subsystem clock (fXT))
○ General-purpose registers: 32 bits × 32 registers
○ Instruction set:
   Signed multiplication, saturation operations, 32-bit shift instructions, bit manipulation instructions, load/store instructions
○ Memory space:
   16 MB linear address space
   Memory block division function: 2 MB per block
○ Internal memory
• Flash memory
   128 KB (µPD70F3015B, 70F3015BY)
   256 KB (µPD70F3017A, 70F3017AY)
• RAM
   4 KB (µPD70F3015B, 70F3015BY)
   8 KB (µPD70F3017A, 70F3017AY)
○ External bus interface: 16-bit data bus
   Address bus: Separate output enabled
○ Interrupts and exceptions
   External: 8, internal: 23, exceptions: 1
○ I/O lines Total: 85
○ Timer/counters
   16-bit timer: 2 channels
   8-bit timer: 4 channels
○ Watch timer: 1 channel
○ Watchdog timer: 1 channel
○ Serial interface (SIO)
   Asynchronous serial interface (UART)
   Clocked serial interface (CSI)
   I2C bus interface (µPD70F3015BY, 70F3017AY)
○ A/D converter: 12 channels
○ DMA controller: 3 channels
○ RTP: 8 bits × 1 channel or 4 bits × 2 channels
○ Power-saving functions: HALT/IDLE/STOP modes
○ Packages: 100-pin plastic LQFP (14 × 14 mm)
                121-pin plastic FBGA (12 × 12 mm)