UPD70208HLP-20中文资料瑞萨数据手册PDF规格书

FEATURES

• High-speed, low-power version of V40 and V50

• High-performance CPU (V20TM/V30TM software compatible)

• Minimum instruction execution time: 100 ns (20 MHz, 5 V)

200 ns (10 MHz, 3 V)

• Memory addressing space: 1M bytes

• High-speed multiply/divide instructions: 0.95 to 2.8 ms (20 MHz, 5 V)

1.9 to 5.6 ms (10 MHz, 3 V)

• Maskable (ICU) & non-maskable (NMI) interrupt inputs

• mPD8080AF emulation function

• Standby functions, clock stoppage capability

• Standard peripheral LSI functions on chip