18M-BIT QDRTM II SRAM 2-WORD BURST OPERATION

Features • 1.8 ± 0.1 V power supply • 165-pin PLASTIC BGA (13 x 15) • HSTL interface • PLL circuitry for wide output data valid window and future frequency scaling • Separate independent read and write data ports with concurrent transactions • 100 bus utilization DDR READ and WRITE operation

文件：464.51 Kbytes 页数：37 Pages

RENESAS

瑞萨

Memory-QDRII/DDRII/ QDRII+/DDRII+ SRAM

Renesas

瑞萨

18M-BIT QDRTM II SRAM 2-WORD BURST OPERATION

Features • 1.8 ± 0.1 V power supply • 165-pin PLASTIC BGA (13 x 15) • HSTL interface • PLL circuitry for wide output data valid window and future frequency scaling • Separate independent read and write data ports with concurrent transactions • 100 bus utilization DDR READ and WRITE operation

文件：464.51 Kbytes 页数：37 Pages

RENESAS

瑞萨

Memory-QDRII/DDRII/ QDRII+/DDRII+ SRAM

Renesas

瑞萨