UPD17201A中文资料瑞萨数据手册PDF规格书

FEATURES

• 17K architecture : General-purpose register method

• Program memory (ROM) : 3072 x 16 bits (mPD17201A)

4096 x 16 bits (mPD17207)

• Data memory (RAM) : 336 x 4 bits (including LCD register 36 ´ 4 bits)

• Infrared remote controller carrier generator (REM output)

• LCD controller/driver : Up to 136 segments can be displayed

· Common pins : 4 (2 can be used as segment pins)

· Segment pins : 34

· Voltage booster circuit for driving LCD : LCD drive voltage can be adjusted from 2.4 to 5.4 V with external

resistor

• 8-bit A/D converter : 4 channels (successive approximation method in software)

• 8-bit timer : 1 channel

• Watch timer/watchdog timer : 1 channel (WDOUT output)

• 3-line serial interface : 1 channel

• External interrupt pin (INT) : 1

• I/O pin : 20 (including INT)

• Instruction execution time : 4 ms (main clock: fX = 4 MHz)

488 ms (subclock: fXT = 32.768 kHz)

• Supply voltage : VDD = 2.2 to 5.5 V (main clock : fX = 4 MHz)

: VDD = 2.0 to 5.5 V (subclock : fXT = 32.768 kHz)