UPD16833AG3中文资料瑞萨数据手册PDF规格书

FEATURES

• Four H bridge circuits employing power MOS FETs

• Low current consumption by eliminating charge pump

VM pin current when power-OFF: 10 μA MAX. VDD pin current: 10 μA MAX.

• Input logic frequency: 100 kHz

• 3-V power supply

Minimum operating supply voltage: 2.5 V

• Low-voltage malfunctioning prevention circuit

• 30-pin plastic shrink SOP (300 mil) (μPD16833AG3)