MONOLITHIC H BRIDGE DRIVER

[NEC] SEMICONDUCTOR SELECTION GUIDE

文件：71.97 Kbytes 页数：8 Pages

NEC

瑞萨

MOS INTEGRATED CIRCUIT

FEATURES • High drive current IDR1 = 0.5 A (DC) IDR2 = 1 A: at PW £ 200 ms, duty cycle £ 50 IDR3 = 3 A: at PW £ 200 ms, single pulse • 1.5ch H bridge circuits • Low ON resistance (sum of ON resistance of top and bottom FETs) RON = 0.6 W TYP. at IDR = 0.5 A • Standby function that turns OFF

文件：185 Kbytes 页数：10 Pages

RENESAS

瑞萨

Intelligent Power Devices-Protected and Intelligent Power Switches

Renesas

瑞萨

18-bit bus-interface D-type flip-flop with reset and enable 3-State

DESCRIPTION The 74ALVCH16823 is a 18-bit edge-triggered flip-flop featuring separate D-type inputs for each flip-flop and 3-state outputs for bus oriented applications. FEATURES • Wide supply voltage range of 1.2V to 3.6V • Complies with JEDEC standard no. 8-1A. • CMOS low power consumpt

文件：103.3 Kbytes 页数：12 Pages

PHI

飞利浦

18-bit bus-interface D-type flip-flop with reset and enable 3-State

DESCRIPTION The 74ALVCH16823 is a 18-bit edge-triggered flip-flop featuring separate D-type inputs for each flip-flop and 3-state outputs for bus oriented applications. FEATURES • Wide supply voltage range of 1.2V to 3.6V • Complies with JEDEC standard no. 8-1A. • CMOS low power consumpt

文件：103.3 Kbytes 页数：12 Pages

PHI

飞利浦

18-bit bus-interface D-type flip-flop with reset and enable 3-State

DESCRIPTION The 74ALVT16823 18-bit bus interface register is designed to eliminate the extra packages required to buffer existing registers and provide extra data width for wider data/address paths of buses carrying parity. FEATURES • Two sets of high speed parallel registers with positive edge

文件：99.78 Kbytes 页数：12 Pages

PHI

飞利浦