UPD16772A数据手册Renesas中文资料规格书

描述 Description

DESCRIPTION
The µ PD16772A is a source driver for TFT-LCDs capable of dealing with displays with 64-gray scales. Data input is based on digital input configured as 6 bits by 6 dots (2 pixels), which can realize a full-color display of 260,000 colors by output of 64 values γ -corrected by an internal D/A converter and 5-by-2 external power modules. Because the output dynamic range is as large as VSS2 + 0.1 V to VDD2 – 0.1 V, level inversion operation of the LCD’s common electrode is rendered unnecessary. Also, to be able to deal with dot-line inversion, n-line inversion and column line inversion when mounted on a single side, this source driver is equipped with a built-in 6-bit D/A converter circuit whose odd output pins and even output pins respectively output gray scale voltages of differing polarity. Assuring a clock frequency of 45 MHz when driving at 2.3 V, this driver is applicable to UXGA-standard TFT-LCD panels.FEATURES
• CMOS level input (2.3 to 3.6 V)
• 480 outputs
• Input of 6 bits (gradation data) by 6 dots
• Capable of outputting 64 values by means of 5-by-2 external power modules (10 units) and a D/A converter (RDAC)
• Output dynamic range : VSS2 + 0.1 V to VDD2 – 0.1 V
• High-speed data transfer : fCLK = 45 MHz (internal data transfer speed when operating at VDD1 = 2.3 V)
• Apply for dot-line inversion, n-line inversion and column line inversion
• Output voltage polarity inversion function (POL)
• Display data inversion function (POL21/22)
• Current consumption reduction function (LPC, Bcont)
• Logic power supply voltage (VDD1) : 2.3 to 3.6 V
• Driver power supply voltage (VDD2) : 8.5 V ± 0.5 V

特性 Features

• CMOS level input (2.3 to 3.6 V)
• 480 outputs
• Input of 6 bits (gradation data) by 6 dots
• Capable of outputting 64 values by means of 5-by-2 external power modules (10 units) and a D/A converter (RDAC)
• Output dynamic range : VSS2 + 0.1 V to VDD2 – 0.1 V
• High-speed data transfer : fCLK = 45 MHz (internal data transfer speed when operating at VDD1 = 2.3 V)
• Apply for dot-line inversion, n-line inversion and column line inversion
• Output voltage polarity inversion function (POL)
• Display data inversion function (POL21/22)
• Current consumption reduction function (LPC, Bcont)
• Logic power supply voltage (VDD1) : 2.3 to 3.6 V
• Driver power supply voltage (VDD2) : 8.5 V ± 0.5 V