UPD16640B中文资料瑞萨数据手册PDF规格书

FEATURES

• CMOS level input

• 6 bits (gray scale data) ´ 3 dots input

• 64-value output by 11 external power supplies and internal D/A converter

• Output voltage range: VSS2 + 0.1 V to VDD2 – 0.1 V

• High-speed data transfer: fMAX. = 55 MHz MIN. (internal data transfer speed when operating at 3.0 V)

• Precharge-less output buffer

• Level of g-corrected power supply can be inverted

• Number of outputs selectable (Osel = H: 300 outputs, Osel = L: 309 outputs)

• Supply voltage of driver circuit selectable (Vsel = H: 3.3 V, Vsel = L: 5.0 V)

• Slim TCP

• Input data inversion function (INV)

• Logic power supply (VDD1): 3.3 V ± 0.3 V

• Driver power supply (VDD2): 3.3 V ± 0.3 V (Vsel = H)

5.0 V ± 0.5 V (Vsel = L)