J-FET INPUT LOW-OFFSET DUAL OPERATIONAL AMPLIFIER

J-FET INPUT LOW-OFFSET DUAL OPERATIONAL AMPLIFIER Dual operational amplifier µPC4094 is a high-speed version of the µPC4092. NECs unique high-speed PNP transistor (fT = 300 MHz) in the output stage realizes a high slew rate of 25 V/µs under voltage-follower conditions without an oscillation probl

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NEC

瑞萨

J-FET Input Low-offset DUAL OperationAL AMPLIFIER

Dual operational amplifier µPC4094 is a high-speed version of the µPC4092. NEC's unique high-speed PNP transistor (fT = 300 MHz) in the output stage realizes a high slew rate of 25 V/ µs under voltage-follower conditions without an oscillation problem. Zener-zap resistor trimming in the input stage • Stable operation with 220 pF capacitive load\n• Low input offset voltage and offset voltage ±3 mV (MAX.) ±7 µV/°C (TYP.) temperature drift\n• Very low input bias and offset currents\n• Low noise: en = 19 nV/ √Hz (TYP.)\n• Output short circuit protection\n• High input impedance ... J-FET Input Stag;

Renesas

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SOP14

RENESAS/瑞萨

上传：深圳市中飞凌科技有限公司

SOP8

RENESAS

瑞萨

上传：深圳市正纳电子有限公司

SOP

NEC

瑞萨

上传：深圳市福田区亿兴成电子商行