UCC27624中文资料具有 4V UVLO、30V VDD 和低传播延迟的 5A/5A 双通道栅极驱动器数据手册TI规格书

描述 Description

The UCC27624 device family comprises dual-channel, high-speed, and low-side gate drivers that effectively drive MOSFET, IGBT, SiC, and GaN power switches. UCC27624 has a typical peak drive strength of 5 A, which helps reduce rise and fall time of the power switches. This results in low switching losses in the power train and therefore enables high efficiency. A small propagation delay of the UCC27624 helps reduce the dead-time and improve pulse width utilization. This further improves the power stage efficiency. Small propagation delay also helps improve control loop response time and may improve transient performance of the system.

UCC27624 can handle –10 V at its inputs. This negative input voltage capability helps to improve system robustness where moderate ground bouncing may exist in the system. The inputs are independent of supply voltage and can be connected to most controller outputs. This allows maximum control flexibility. An independent enable signal allows the power stage to be controlled independently of main control logic; that is, the gate driver can quickly shut-off the power stage in an event where there is a fault in the system that requires the power train to be turned-off immediately. Many high-frequency switching power supplies exhibit high-frequency noise at the gate of the power device, which can get injected into the output pin on the gate driver and can cause the driver to malfunction. Due to the UCC2762x transient reverse current and reverse voltage capability, the driver performs well in such conditions and systems.

The UCC27624 family of devices has an undervoltage lockout (UVLO) feature so that when there is not enough bias voltage to fully enhance the power device, the gate driver output is held low by the strong internal pull down MOSFET. This active pull-down feature further improves system robustness.

特性 Features

• 30-V absolute maximum bias voltage
• Two independent gate-drive channels
• 5-A peak source and sink-drive current for each channel
• Independent-enable function for each output
• Hysteretic-logic thresholds for high noise immunity
• Input and enable pins capable of withstanding up to –10 V
• VDD independent input thresholds (TTL compatible)
• Wide VDD operating range from 4.5 V to 26 V
• Fast propagation delays (17-ns Typical)
• Fast rise and fall times (3.5-ns and 6-ns typical)
• 1-ns typical delay matching between 2-channels
• Two channels can be paralleled for higher drive current
• SOIC8 and VSSOP8 PowerPAD™ package options
• Operating junction temperature range of –40°C to 150°C