UCC27524ADGNR集成电路（IC）的栅极驱动器规格书PDF中文资料

UCC27524ADGNR属于集成电路（IC）的栅极驱动器。由德州仪器制造生产的UCC27524ADGNR栅极驱动器栅极驱动器电源管理集成电路 (PMIC) 可用于提供隔离、放大、参考位移、自举或其他必要功能，这些功能可将来自电源转换应用中控制设备的信号连接到电源被控制通过的半导体设备（通常为 FET 或 IGBT）。任何特定设备提供的确切功能各不相同，但与它适合驱动的半导体配置相关。

1 Features

• Industry-standard pin out

• Two independent gate-drive channels

• 5A peak source and sink-drive current

• Independent-enable function for each output

• TTL and CMOS compatible logic threshold

independent of supply voltage

• Hysteretic-logic thresholds for high noise immunity

• Ability to handle negative voltages (–5V) at inputs

• Inputs and enable pin-voltage levels not restricted

by VDD pin bias supply voltage

• 4.5V to 18V single-supply range

• Outputs held low during VDD-UVLO (ensures

glitch-free operation at power up and power down)

• Fast propagation delays (17ns typical)

• Fast rise and fall times (6ns and 10ns typical)

• 1ns typical delay matching between 2-channels

• Two outputs are paralleled for higher drive current

• Outputs held in low when inputs floating

• SOIC-8, HVSSOP-8 PowerPAD™ package options

• Operating junction temperature range of –40 to

150°C

2 Applications

• Switch-mode power supplies

• DC-to-DC converters

• Motor control, solar power

• Gate drive for emerging wide band-gap power

devices such as GaN

3 Description

The UCC27524A device is a dual-channel, highspeed,

low-side, gate-driver device capable of

effectively driving MOSFET and IGBT power

switches. The UCC27524A is a variant of the

UCC2752x family. The UCC27524A adds the ability

to handle –5V directly at the input pins for increased

robustness. The UCC27524A is a dual non-inverting

driver. Using a design that inherently minimizes

shoot-through current, the UCC27524A is capable of

delivering high-peak current pulses of up to 5A source

and 5A sink into capacitive loads along with rail-torail

drive capability and extremely small propagation

delay typically 17ns. In addition, the drivers feature

matched internal propagation delays between the two

channels which are very well suited for applications

requiring dual-gate drives with critical timing, such as

synchronous rectifiers. This also enables connecting

two channels in parallel to effectively increase currentdrive

capability or driving two switches in parallel

with a single input signal. The input pin thresholds

are based on TTL and CMOS compatible low-voltage

logic, which is fixed and independent of the VDD

supply voltage. Wide hysteresis between the high and

low thresholds offers excellent noise immunity.