UCC27301A-Q1中文资料德州仪器数据手册PDF规格书

1 Features

• Drives two N-channel MOSFETs in half-bridge

configuration

• AEC-Q100 qualified for automotive applications:

– Device temperature grade 1

• –40°C to +150°C junction temperature range

• 120V abs max voltage on HB pin

• 3.7A sink, 4.5A source output currents

• 8V to 17V VDD operating range (20V abs max)

with UVLO

• –(28–VDD)V abs max negative transient tolerance

on HS pin (<100ns pulse)

• –10V to +20V abs max input pins tolerance,

independent of supply voltage range (TTL

compatible)

• Switching parameters:

– 20ns typical propagation delay times

– 7.2ns rise and 5.5ns fall time with 1000pF load

– 4ns typical delay matching

• Integrated bootstrap diode

• Input interlock

• Enable/disable functionality with low current

consumption (3μA typical) when disabled (DRC

package only)

• Functional Safety-Capable

– Documentation available to aid functional safety

system design

2 Applications

• Automotive DC/DC converters and OBC

• 2-wheeler and 3-wheeler traction drive and battery

pack

• Electric power steering (EPS)

• Wireless charging

• Smart glass module

3 Description

The UCC27301A-Q1 is a robust gate driver designed

to drive two N-channel MOSFETs in a half-bridge

or synchronous buck configuration with an absolute

maximum bootstrap voltage of 120V. Its 3.7A peak

source and 4.5A peak sink current capability allows

the UCC27301A-Q1 to drive large power MOSFETs

with minimized switching losses during the transition

through the Miller Plateau. The switching node

(HS pin) can handle negative transient voltage,

which allows the high-side channel to be protected

from inherent negative voltages caused by parasitic

inductance and stray capacitance.

The inputs are independent of supply voltage and are

able to withstand -10V and +20V absolute maximum

ratings. The low-side and high-side gate drivers are

matched to 4ns between the turn on and turn off of

each other and are controlled throught the LI and HI

input pins respectively. However, the input interlock

logic will turn both driver outputs low whenever both LI

and HI inputs are high at the same time. An on-chip

120V rated bootstrap diode eliminates the need to

add discrete bootstrap diodes. Undervoltage lockout

(UVLO) is provided for both the high-side and the

low-side drivers which provides symmetric turn on and

turn off behavior and forces the outputs low if the

drive voltage is below the specified threshold.