UC2832-EP数据手册TI中文资料规格书

描述 Description

The UC2832 series of precision linear regulators include all the control functions required in the design of very low dropout linear regulators. Additionally, they feature an innovative duty-ratio current limiting technique which provides peak load capability while limiting the average power dissipation of the external pass transistor during fault conditions. When the load current reaches an accurately programmed threshold, a gated-astable timer is enabled, which switches the regulator’s pass device off and on at an externally programmable duty-ratio. During the on-time of the pass element, the output current is limited to a value slightly higher than the trip threshold of the duty-ratio timer. The constant-current-limit is programmable on the UC2832 to allow higher peak current during the on-time of the pass device. With duty-ratio control, high initial load demands and short circuit protection may both be accommodated without extra heat sinking or foldback current limiting. Additionally, if the timer pin is grounded, the duty-ratio timer is disabled, and the IC operates in constant-voltage/constant-current regulating mode.
These IC’s include a 2 Volt (±1%) reference, error amplifier, UVLO, and a high current driver that has both source and sink outputs, allowing the use of either NPN or PNP external pass transistors. Safe operation is assured by the inclusion of under-voltage lockout (UVLO) and thermal shutdown.

特性 Features

• Controlled Baseline
- One Assembly/Test Site, One Fabrication Site
• Extended Temperature Performance of –40°C to 85°C
• Enhanced Diminishing Manufacturing Sources (DMS) Support
• Enhanced Product Change Notification
• Qualification Pedigree
• Precision 1% Reference
• Over-Current Sense Threshold Accurate to 5%
• Programmable Duty-Ratio Over-Current Protection
• 4.5 V to 36 V Operation
• 100 mA Output Drive, Source or Sink
• Under-Voltage Lockout
• Adjustable Current Limit to Current Sense Ratio
• Separate +VIN terminal
• Programmable Driver Current Limit
• Access to VREF and E/A(+)
• Logic-Level Disable Input
Component qualification in accordance with JEDEC and industry standards to ensure reliable operation over an extended temperature range. This includes, but is not limited to, Highly Accelerated Stress Test (HAST) or biased 85/85, temperature cycle, autoclave or unbiased HAST, electromigration, bond intermetallic life, and mold compound life. Such qualification testing should not be viewed as justifying use of this component beyond specified performance and environmental limits.