U74AHCT126数据手册UTC中文资料规格书

描述 Description

The U74AHCT126 are quadruple bus buffer gates featuringindependent line drivers with 3-state outputs. When OE is low, the nYoutputs are in a high-impedance state. When OE is high, the devicepasses noninverted data from the nA input to its nY output.To ensure the high-impedance state during power up or powerdown, OE should be tied to GND through a pull-down resistor; theminimum value of the resistor is determined by the current-sourcingcapability of the driver.

特性 Features

TTL-Voltage compatible Max t PD of 7.5 ns from A to Y at V CC  = 5V, C L  = 50pF Low power consumption, I CC = 2μA (Max) at 5.5V ±8mA output driver at 5V