U631H64BDC35G1数据手册Renesas中文资料规格书

描述 Description

The U631H64 has two separate modes of operation: SRAM mode and nonvolatile mode. In SRAM mode, the memory operates as an ordinary static RAM. In nonvolatile operation, data is transferred in parallel from SRAM to EEPROM or from EEPROM to SRAM. In this mode SRAM functions are disabled.
The U631H64 is a fast static RAM (25, 35, 45 ns), with a nonvolatile electrically erasable PROM (EEPROM) element incorporated in each static memory cell. The SRAM can be read and written an unlimited number of times, while independent nonvolatile data resides in EEPROM. Data transfers from the SRAM to the EEPROM (the STORE operation), or from the EEPROM to the SRAM (the RECALL operation) are initiated integrity.

特性 Features

❐ High-performance CMOS non volatile static RAM 8192 x 8 bits
❐ 25, 35 and 45 ns Access Times
❐ 12, 20 and 25 ns Output Enable Access Times
❐ Software STORE Initiation (STORE Cycle Time < 10 ms)
❐ Automatic STORE Timing
❐ 105 STORE cycles to EEPROM
❐ 10 years data retention in EEPROM
❐ Automatic RECALL on Power Up
❐ Software RECALL Initiation (RECALL Cycle Time < 20 µs)
❐ Unlimited RECALL cycles from EEPROM
❐ Unlimited Read and Write to SRAM
❐ Single 5 V ± 10 % Operation
❐ Operating temperature ranges: 0 to 70 °C -40 to 85 °C
❐ QS 9000 Quality Standard
❐ ESD characterization according MIL STD 883C M3015.7-HBM (classification see IC Code Numbers)
❐ RoHS compliance and Pb- free
❐ Packages: PDIP28 (300 mil)
               SOP28 (330 mil)