TUSB6020数据手册集成电路（IC）的控制器规格书PDF

特性 Features

·USB On-the-Go (OTG) Controller Core·Uses Mentor Graphics USB 2.0 OTG Core
·Dual-Role Controller Can Operate Either as a Function Controller for a USB Peripheral or as the Host/Peripheral in Point-to-Point or Multipoint Communications With Other USB Functions
·Compliant With the USB 2.0 Standard for High-Speed (480-Mbps) Functions and With OTG Supplement to USB 2.0 Specification
·Supports OTG Communications With One or More High-, Full-, or Low-Speed Devices
·Supports Session Request Protocol (SRP) and Host Negotiation Protocol (HNP)
·Supports Suspend-and-Resume Signaling
·Configurable for up to 4 Transmit Endpoints or up to 4 Receive Endpoints
·Configurable FIFOs, Including the Option of Dynamic FIFO Sizing
·16k-Byte RAM for USB Endpoint FIFO Shared by USB In/Out Endpoints
·Support for External Direct Memory Access (DMA) to FIFOs
·Soft Connect/Disconnect Option
·Performs All Transaction Scheduling in Hardware

·System Control Module·Controls Clock and Reset Generation and Distribution
·Controls and Observes Device Power States
·Supports External Power Management

·Integrated USB 2.0 OTG PHY·Fully Compliant with USB 2.0 Standard and USB 2.0 Transceiver Macrocell Interface (UTMI) Revision 1.05
·Optimized One-Port Operation at Low Speed (1.5 Mbps), Full Speed (12 Mbps), and High Speed (480 Mbps)
·Supports UTMI+3 Level 3 (Host and OTG Devices, High/Full/Low Speed and Preamble Packet)
·Protection Circuitry to Withstand Possible VBUS Short
·Use 19.200-MHz or 24.000-MHz Reference Clock Input as a Crystal or External Clock Driver
·At-Speed Built-In Self Test (BIST) With Internal Asynchronous Capability Through Loopback
·On-Chip Integrated Accurate 45- Pulldown Resistors
·On-Chip Phase-Locked Loop (PLL) to Reduce Noise on High-Speed Clocks
·Active Power Consumption Less Than 100 mW

·VLYNQ 2.0 Interface to External Host Controller·High-Speed (150-MHz) Point-to-Point Serial Interface for Direct Connection to Other VLYNQ Interface
·Supports 4 Receive (RX) and 4 Transmit (TX) Lines
·Memory-Mapped Master/Slave
·Hardware Flow Control Internal Loopback Mode
·Multichannel DMA Controller
·Integrated List Processor Capable of Parsing Communications Port Programming Interface (CPPI) 3.0-Compliant Buffer Descriptors

·High-Performance 80-Pin MicroStar BGA™/MicroStar Junior™ZQE Package
·High-Performance 80-Pin PFC Package
MicroStar BGA Is a trademark of Texas Instruments MicroStar Junior, MicroStar Junior Is a trademark of Texas Instruments DESCRIPTION/ORDERING INFORMATIONThe TUSB6020 is a USB 2.0 high-speed, on-the-go (OTG) dual-role controller designed for a seamless interface to the VLYNQ serial interface, and is ideal for a wide range of applications. The USB OTG dual-role controller can operate either as a function controller for a USB peripheral or as the host/peripheral in point-to-point or multipoint communications with other functions. The integrated USB 2.0 PHY provides one-port operation at low speed (1.5 Mbps), full speed (12 Mbps), and high speed (480 Mbps). The VLYNQ serial interface is a low pin count, high-speed, point-to-point interface.The device is fully compliant with Universal Serial Bus Specification Revision 2.0 and On-the-Go Supplement to the USB Specification Revision 1.3.