首页 >TS6821>规格书列表
| 零件编号 | 下载 订购 | 功能描述/丝印 | 制造商 上传企业 | LOGO |
|---|---|---|---|---|
PERIPHERALINTERFACEADAPTER CMOSLSI(LOW-POWERCOMPLEMENTARYMOS)31/2DIGITA/DCONVERTER | MotorolaMotorola, Inc 摩托罗拉加尔文制造公司 | Motorola | ||
CustomerSpecification | ALPHAWIREAlpha Wire 阿尔法电线 | ALPHAWIRE | ||
CustomerSpecification Construction 1)Component11X1HOOKUP a)Conductor26(7/34)AWGBareCopper0.019 b)Insulation 0.008Wall,Nom.Modified PolyphenyleneEther 0.035+/-0.002 (1)Color(s) WHITE,BLACK,RED,GREEN,YELLOW,BLUE,BROWN ORANGE,GREEN/YELLOW | ALPHAWIREAlpha Wire 阿尔法电线 | ALPHAWIRE | ||
DABiC-58-BitSerialInputLatchedSinkDrivers FEATURES 3.3Vto5Vlogicsupplyrange Poweronreset(POR) To10MHzdatainputrate CMOS,TTLcompatible –40°Coperationavailable Schmitttriggerinputsforimproved noiseimmunity Low-powerCMOSlogicandlatches High-voltagecurrent-sinkoutputs Internalpull-up | ALLEGRO Allegro MicroSystems | ALLEGRO | ||
DABiC-58-BitSerialInputLatchedSinkDrivers FEATURES 3.3Vto5Vlogicsupplyrange Poweronreset(POR) To10MHzdatainputrate CMOS,TTLcompatible –40°Coperationavailable Schmitttriggerinputsforimproved noiseimmunity Low-powerCMOSlogicandlatches High-voltagecurrent-sinkoutputs Internalpull-up | ALLEGRO Allegro MicroSystems | ALLEGRO | ||
DABiC-58-BitSerialInputLatchedSinkDrivers FEATURES 3.3Vto5Vlogicsupplyrange Poweronreset(POR) To10MHzdatainputrate CMOS,TTLcompatible –40°Coperationavailable Schmitttriggerinputsforimproved noiseimmunity Low-powerCMOSlogicandlatches High-voltagecurrent-sinkoutputs Internalpull-up | ALLEGRO Allegro MicroSystems | ALLEGRO | ||
DABiC-58-BitSerialInputLatchedSinkDrivers FEATURES 3.3Vto5Vlogicsupplyrange Poweronreset(POR) To10MHzdatainputrate CMOS,TTLcompatible –40°Coperationavailable Schmitttriggerinputsforimproved noiseimmunity Low-powerCMOSlogicandlatches High-voltagecurrent-sinkoutputs Internalpull-up | ALLEGRO Allegro MicroSystems | ALLEGRO | ||
Single/DualisoSPITransceiver GENERALDESCRIPTION TheADBMS68211(single)andADBMS68221(dual)providebidirectional isolatedserialportinterface(isoSPI™)communications betweentwoisolateddevicesthroughasingletwistedpairconnection foreachdatalink.Eachtransceiverencodeslogicstatesinto signalsthatare | ADAnalog Devices 亚德诺亚德诺半导体技术有限公司 | AD | ||
Single/DualisoSPITransceiver FEATURES ►Upto2Mbpsisolatedbidirectionalserialdatacommunications ►Dropincompatible:single(ADBMS6821)anddual (ADBMS6822) ►Fullyindependentdualtransceivers(ADBMS6822) ►Simplegalvanicisolationusingcapacitorsortransformers ►Bidirectionalinterfaceoverasingletwist | ADAnalog Devices 亚德诺亚德诺半导体技术有限公司 | AD | ||
Single/DualisoSPITransceiver FEATURES ►Upto2Mbpsisolatedbidirectionalserialdatacommunications ►Dropincompatible:single(ADBMS6821)anddual (ADBMS6822) ►Fullyindependentdualtransceivers(ADBMS6822) ►Simplegalvanicisolationusingcapacitorsortransformers ►Bidirectionalinterfaceoverasingletwist | ADAnalog Devices 亚德诺亚德诺半导体技术有限公司 | AD |
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