TPS59124中文资料用于嵌入式计算中的适用于低输出电压轨的 3V 至 28V 双通道同步降压控制器数据手册TI规格书

描述 Description

The TPS59124 is a dual, adaptive on-time D-CAP mode synchronous buck controller. This device enables system designers to cost effectively complete the suite of embedded computer power bus regulators with the absolute lowest external component count and lowest standby consumption. The fixed-frequency emulated adaptive on-time control supports seamless operation between PWM mode at heavy load condition and reduced frequency operation at light load for high-efficiency down to milliampere range. The main control loop for the TPS59124 uses the D-CAP mode that optimized for low-ESR output capacitors such as POSCAP or SP-CAP promises fast transient response with no external compensation. Simple and separate power good signals for each channel allow flexibility of power sequencing. The device provides convenient and efficient operation with supply input voltages (V5IN, V5FILT) ranging from 4.5 V to 5.5 V, conversion voltages (drain voltage for the synchronous high-side MOSFET) from 3 V to 28 V and output voltages from 0.76 V to 5.5 V.

The TPS59124 is available in 24-pin QFN package specified from –40°C to 85°C ambient temperature range.

特性 Features

• High Efficiency, Low-Power Consumption, Shutdowns to DS(on) Loss-less Current Sensing
• Adaptive Gate Drivers With Integrated Boost Diode
• Internal 1.2-ms Voltage-Servo Soft Start
• Power-Good Signals for Each Channel With Delay Timer
• Output Discharge During Disable, Fault
• APPLICATIONS
• I/O and Low Voltage System Bus in Embedded Computing Systems