TPS59116中文资料完整的 DDR、DDR2 和 DDR3 存储器电源解决方案、用于嵌入式计算的同步降压控制器数据手册TI规格书

描述 Description

The TPS59116 provides a complete power supply for DDR/SSTL-2, DDR2/SSTL-18, and DDR3 memory systems. It integrates a synchronous buck controller with a 3-A sink/source tracking linear regulator and buffered low noise reference. The TPS59116 offers the lowest total solution cost in systems where space is at a premium. The TPS59116 synchronous controller runs fixed 400-kHz pseudo-constant frequency PWM with an adaptive on-time control that can be configured in D-CAP™ Mode for ease of use and fastest transient response or in current mode to support ceramic output capacitors. The 3-A sink/source LDO maintains fast transient response only requiring 20-µF (2 × 10 µF) of ceramic output capacitance. In addition, the LDO supply input is available externally to significantly reduce the total power losses. The TPS59116 supports all of the sleep state controls placing VTT at high-Z in S3 (suspend to RAM) and discharging VDDQ, VTT and VTTREF (soft-off) in S4/S5 (suspend to disk). TPS59116 has all of the protection features including thermal shutdown and is offered in both a 20-pin HTSSOP PowerPAD™ package and 24-pin 4×4 QFN.

特性 Features

• Synchronous Buck Controller (VDDQ)
• D-CAP™ Mode with 100-ns Load Step Response
• Supports Soft-Off in S4/S5 States
• 2.5-V (DDR), 1.8-V (DDR2), Adjustable to 1.5-V (DDR3) or Output Range 0.75-V to 3.0-V
• 3-A LDO (VTT), Buffered Reference (VREF)
• LDO Input Available to Optimize Power Losses
• Buffered Low Noise 10-mA VREF Output
• Supports High-Z in S3 and Soft-Off in S4/S5
• APPLICATIONS
• SSTL-2 SSTL-18 and HSTL Termination

D-CAP, PowerPAD are trademarks of Texas Instruments.