3-A SINK/SOURCE DDR TERMINATION REGULATOR

文件：704.11 Kbytes 页数：20 Pages

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INTEGRATED LDO WITH SWITCHOVER CIRCUIT FOR NOTEBOOK COMPUTERS

文件：672.31 Kbytes 页数：17 Pages

TI

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INTEGRATED LDO WITH SWITCHOVER CIRCUIT FOR NOTEBOOK COMPUTERS

文件：672.31 Kbytes 页数：17 Pages

TI

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INTEGRATED LDO WITH SWITCHOVER CIRCUIT FOR NOTEBOOK COMPUTERS

文件：672.31 Kbytes 页数：17 Pages

TI

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SYNCHRONOUS-BUCK PWM CONTROLLER WITH NMOS LDO CONTROLLER

文件：941.41 Kbytes 页数：43 Pages

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SYNCHRONOUS-BUCK PWM CONTROLLER WITH NMOS LDO CONTROLLER

文件：941.41 Kbytes 页数：43 Pages

TI

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SYNCHRONOUS-BUCK PWM CONTROLLER WITH NMOS LDO CONTROLLER

文件：941.41 Kbytes 页数：43 Pages

TI

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3A 拉电流/灌电流 DDR 终端器稳压器

The TPS51100 is a 3-A, sink/source tracking termination regulator. The device is specifically designed for low-cost and low-external component count systems where space is a premium.\n\nThe TPS51100 maintains fast transient response, only requiring 20 µF (2 × 10 µF) of ceramic output capacitance. Th • Input Voltage Range: 4.75 V to 5.25 V\n• VLDOIN Voltage Range: 1.2 V to 3.6 V\n• 3-A Sink/Source Termination Regulator Includes Droop Compensation\n• Requires Only 20-μF Ceramic Output Capacitance\n• Supports Hi-Z in S3 and Soft-Off in S5\n• 1.2-V Input (VLDOIN) Helps Reduce Total Power Dissipatio;

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适用于笔记本电脑、具有切换电路的集成 LDO

The TPS51103 integrates three LDOs. The 5-V and 3.3-V LDOs are both rated at 100 mA and also include a glitch-free switch-over feature allowing for optimized battery life. An additional 3.3-V LDO is designed to provide an always on power output for the real time clock (RTC). The TPS51103 integrates • Wide Input Voltage Range: 4.5 V to 28 V\n• 5-V/3.3-V, 100-mA, LDO Output\n• Glitch Free Switch Over Circuit\n• Always-On 3.3-V, 5-mA LDO Output for RTC\n• 250 kHz Clock Output for Charge Pump\n• Thermal Shutdown (Non-latch)\n• 10Ld QFN (DRC) Package\n• APPLICATIONS \n• Notebook Computers\n• Mobile;

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Package：10-PowerTFSOP，10-MSOP（0.118"，3.00mm 宽）；包装：卷带（TR） 类别：集成电路（IC） 特殊用途稳压器 描述：IC REG CONV DDR 1OUT 10MSOP

TI2

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