TPS3423_V01中文资料德州仪器数据手册PDF规格书

1 Features

• Operating voltage range: 1V to 6V

• Nano supply current: 22nA (typical)

• HBM ESD rating on push-button pin: 10kV

• Programmable short press and long press duration

– TPS3423, TPS3424 fixed timing options:

• Short press duration: 50msec to 13 sec

• Long press duration: 1sec to 30 sec

• Timer accuracy (max): 10 %

– TPS3424: user-programmable option (50 msec

to 50 sec) through external capacitor

• Output configurations:

– RESET configurations:

• Push-pull / open-drain, active high / low

• Latched / non-latched

• 100msec to 1sec pulse option for nonlatched

version

– INT configurations:

• open drain, active low

• non-latched (100msec to 1sec pulse

duration)

• Kill feature: used as feedback from the host to deassert

RESET

• Available in pin compatible 8 pin and 6 pin DRL

package

2 Applications

• Wearables

• Gaming consoles

• Home theater entertainment

• Printers

• Health care

• Portable electronics

• Factory automation & control

3 Description

TPS3423 and TPS3424 are push-button controllers

which offer wide range of independent short press

and long press functionality. These devices offer up to

two outputs per push-button (RESET and INT), which

can be used for various use cases including enabling

the voltage regulator or circuit breakers, sending an

interrupt to micro controller and generating logic. The

device generates an interrupt pulse both for short

press and long press notifying the micro controller.

RESET output changes the state based on the device

configuration.

By controlling the power tree running off the battery,

TPS3423/4 extends battery life and prolongs device

shelf life. This feature is also known as battery

freshness seal.

TPS3423/4 are offered in fixed timing options for short

and long press durations. To provide flexibility to the

designer, TPS3424 also offers user-programmable

short and long press durations through an external

capacitor. Kill pin in TPS3424 enables feedback

from the microcontroller to asynchronously de-assert

RESET.