TPMC685中文资料TEWS数据手册PDF规格书

Application Information

The TPMC685 is a standard single-width 32 bit PMC module offering up to 128 bit of TTL I/O arranged in 16 x 8 bit ports. Direction of the I/O lines is software programmable for each of the ports. Each port is built up using a TTL bus transceiver. Each line is protected against ESD and overvoltage.

Software selectable Pullup / Pulldown Resistors are available on all I/O lines.

Each input can generate an interrupt. Signal edge handling is programmable to interrupt on rising and/or falling edge of the input signal. Interrupts can be enabled and disabled for each bit. For interrupt source detection the status of each bit can be read from the interrupt status register.

To eliminate spikes and glitches, keeping interrupts to a minimum, each port has its own user configurable input filter.

All outputs drive 5V TTL levels with up to 24mA.

It is possible to read or write synchronously all 128 lines.

The first 64 bits of TTL I/O are accessible via the front panel HD68 SCSI-3 type connector and the second 64 bits of TTL I/O via rear panel P14.

TPMC685-11R provides 8 additional ground contacts on the P14 connector. These grounds reduce the number of Back-I/O lines to 56, but improve the signal integrity.

To deal with software faults, the TPMC685 provides a user configurable Watchdog timer. It can set all outputs in a user defined (save) state when the watchdog expires.

Two Timers are included in the TPMC685 for easy implementation of equidistant input sampling or output setting.

Software Support for different operating systems is available.