TPIC6259N集成电路（IC）的锁存器规格书PDF中文资料

TPIC6259N属于集成电路（IC）的锁存器。由德州仪器制造生产的TPIC6259N锁存器锁存器是类似于触发器的基本数字存储设备，但是不同之处在于，在锁存使能（或类似命名）信号处于有效逻辑状态的任何时间，保持的逻辑状态都可以改变。“透明”锁存器还允许设备输出在锁存使能信号有效时反映输入的当前状态，而相反的是，状态仅在保持状态已固定时改变。

Low rDS(on) . . . 1.3 Ω Typical

Avalanche Energy . . . 75 mJ

Eight Power DMOS Transistor Outputs of

250-mA Continuous Current

1.5-A Pulsed Current Per Output

Output Clamp Voltage at 45 V

Four Distinct Function Modes

Low Power Consumption

description

This power logic 8-bit addressable latch controls

open-drain DMOS transistor outputs and is

designed for general-purpose storage applications

in digital systems. Specific uses include

working registers, serial-holding registers, and

decoders or demultiplexers. This is a multifunctional

device capable of storing single-line

data in eight addressable latches with 3-to-8

decoding or demultiplexing mode active-low

DMOS outputs.

Four distinct modes of operation are selectable by

controlling the clear (CLR) and enable (G) inputs

as enumerated in the function table. In the

addressable-latch mode, data at the data-in (D)

terminal is written into the addressed latch. The

addressed DMOS transistor output inverts the

data input with all unaddressed DMOS-transistor

outputs remaining in their previous states. In the

memory mode, all DMOS-transistor outputs

remain in their previous states and are unaffected

by the data or address inputs. To eliminate the

possibility of entering erroneous data in the latch,

enable G should be held high (inactive) while the

address lines are changing. In the 3-to-8 decoding

or demultiplexing mode, the addressed output is inverted with respect to the D input and all other outputs are

high. In the clear mode, all outputs are high and unaffected by the address and data inputs.

Separate power and logic level ground pins are provided to facilitate maximum system flexibility. Pins 1, 10, 11,

and 20 are internally connected, and each pin must be externally connected to the power system ground in order

to minimize parasitic inductance. A single-point connection between pin 9, logic ground (LGND), and pins 1, 10,

11, and 20, power ground (PGND) must be externally made in a manner that reduces crosstalk between the

logic and load circuits.

The TPIC6259 is characterized for operation over the operating case temperature range of –40°C to 125°C.