TP5322中文资料SUTEX数据手册PDF规格书

General Description

These low threshold enhancement-mode (normally-off) transistors utilize an advanced vertical DMOS structure and Supertexs well-proven silicon-gate manufacturing process. This combination produces devices with the power handling capabilities of bipolar transistors and with the high input impedance and positive temperature coefficient inherent in MOS devices. Characteristic of all MOS structures, these devices are free from thermal runaway and thermally-induced secondary breakdown.

特性 Features

❐ Low threshold, -2.4V max.

❐ High input impedance

❐ Low input capacitance, 110pFmax.

❐ Fast switching speeds

❐ Low on resistance

❐ Free from secondary breakdown

❐ Low input and output leakage

❐ Complementary N- and P-channel devices

Application

❐ Logic level interfaces-ideal for TTL and CMOS

❐ Battery operated systems

❐ Photo voltaic devices

❐ Analog switches

❐ General purpose line drivers

❐ Telecom switches