P-Channel Enhancement-Mode Vertical DMOS FET

General Description This low threshold, enhancement-mode (normally-off) transistor utilizes a vertical DMOS structure and Supertex’s well-proven, silicon-gate manufacturing process. This combination produces a device with the power handling capabilities of bipolar transistors and the high inpu

文件：697.33 Kbytes 页数：5 Pages

SUTEX

P-Channel Enhancement-Mode Vertical DMOS FET

General Description This low threshold, enhancement-mode (normally-off) transistor utilizes a vertical DMOS structure and Supertex’s well-proven, silicon-gate manufacturing process. This combination produces a device with the power handling capabilities of bipolar transistors and the high inpu

文件：697.33 Kbytes 页数：5 Pages

SUTEX

P-Channel Enhancement-Mode Vertical DMOS FET

General Description This low threshold, enhancement-mode (normally-off) transistor utilizes a vertical DMOS structure and Supertex’s well-proven, silicon-gate manufacturing process. This combination produces a device with the power handling capabilities of bipolar transistors and the high inpu

文件：697.33 Kbytes 页数：5 Pages

SUTEX

P-Channel Enhancement-Mode Vertical DMOS FET

General Description This low threshold, enhancement-mode (normally-off) transistor utilizes a vertical DMOS structure and Supertex’s well-proven, silicon-gate manufacturing process. This combination produces a device with the power handling capabilities of bipolar transistors and the high inpu

文件：697.33 Kbytes 页数：5 Pages

SUTEX

P-Channel Enhancement-Mode Vertical DMOS FET

General Description This low threshold, enhancement-mode (normally-off) transistor utilizes a vertical DMOS structure and Supertex’s well-proven, silicon-gate manufacturing process. This combination produces a device with the power handling capabilities of bipolar transistors and the high inpu

文件：697.33 Kbytes 页数：5 Pages

SUTEX

P-Channel Enhancement-Mode Vertical DMOS FET

General Description This low threshold, enhancement-mode (normally-off) transistor utilizes a vertical DMOS structure and Supertex’s well-proven, silicon-gate manufacturing process. This combination produces a device with the power handling capabilities of bipolar transistors and the high inpu

文件：697.33 Kbytes 页数：5 Pages

SUTEX

P-Channel Enhancement-Mode Vertical DMOS FET

General Description\nThis  low threshold, enhancement-mode (normally-off) transistor utilizes a vertical DMOS structure and Supertex’s well-proven, silicon-gate manufacturing process. This combination produces a device with the power handling capabilities of bipolar transistors and the high input im ►Lowthreshold (-2.4V max.)\n►High input impedance\n►Low input capacitance (95pF typical)\n►Fast switching speeds\n►Low on-resistance\n►Free from secondary breakdown\n►Low input and output leakageApplications\n►Logic level interfaces - ideal for TTL and CMOS\n►Solid state relays\n►Battery operated sy;

Microchip

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