TMUX722X中文资料德州仪器数据手册PDF规格书

1 Features

• Latch-up immune

• Dual supply range: ±4.5 V to ±22 V

• Single supply range: 4.5 V to 44 V

• Low on-resistance: 2.1 Ω

• –40°C to +125°C operating temperature

• 1.8 V logic compatible

• Integrated pull-down resistor on logic pins

• Fail-safe logic

• Rail-to-rail operation

• Bidirectional operation

2 Applications

• Optical networking

• Optical test equipment

• HVAC controller

• Ultrasound scanners

• Active oscilloscope probes

• Factory automation and industrial controls

• Programmable logic controllers (PLC)

• Analog input modules

• Semiconductor test

• Patient monitoring and diagnostics

• Wired networking

• Data acquisition systems

3 Description

The TMUX722x are complementary metal-oxide

semiconductor (CMOS) switches with latch-up

immunity in a dual channel, 1:1 (SPST) configuration.

These devices work with a single supply (4.5 V to 44

V), dual supplies (±4.5 V to ±22 V), or asymmetric

supplies (such as VDD = 12 V, VSS = –5 V). The

TMUX722x supports bidirectional analog and digital

signals on the source (Sx) and drain (D) pins ranging

from VSS to VDD.

The TMUX722x can be enabled or disabled by

controlling the SEL pins, turning on signal path 1

(S1 to D1) or signal path 2 (S2 to D2). All logic

control inputs support logic levels from 1.8 V to VDD,

allowing for both TTL and CMOS logic compatibility

when operating in the valid supply voltage range. Failsafe

logic circuitry allows voltages on the control pins

to be applied before the supply pin, protecting the

device from potential damage. For more information,

see Section 8.3.5.

The TMUX72xx family provides latch-up immunity,

preventing undesirable high current events between

parasitic structures within the device typically caused

by overvoltage events. A latch-up condition typically

continues until the power supply rails are turned off

and can lead to device failure. The latch-up immunity

feature allows the TMUX72xx family of switches and

multiplexers to be used in harsh environments.