首页 >TLV320AIC24C>规格书列表
| 型号 | 下载 订购 | 功能描述 | 制造商 上传企业 | LOGO |
|---|---|---|---|---|
TLV320AIC24C | Layout and Grounding Guidelines for TLV320AIC2x 文件：983.6 Kbytes 页数：53 Pages | TI 德州仪器 | TI | |
丝印：320AIC24C；Package：TQFP(PFB)；Low-Power, Highly-Integrated, Programmable 16-Bit, 26-KSPS, Dual-Channel CODEC FEATURES · Stereo 16-Bit Oversampling Sigma-Delta A/D Converter · Stereo 16-Bit Oversampling Sigma-Delta D/A Converter · Support Maximum Master Clock of 100 MHz to Allow DSPs Output Clock to be Used as a Master Clock · Selectable FIR/IIR Filter With Bypassing Option · Programmable Sampli 文件：1.24218 Mbytes 页数：59 Pages | TI 德州仪器 | TI | ||
丝印：320AIC24C；Package：TQFP(PFB)；Low-Power, Highly-Integrated, Programmable 16-Bit, 26-KSPS, Dual-Channel CODEC FEATURES · Stereo 16-Bit Oversampling Sigma-Delta A/D Converter · Stereo 16-Bit Oversampling Sigma-Delta D/A Converter · Support Maximum Master Clock of 100 MHz to Allow DSPs Output Clock to be Used as a Master Clock · Selectable FIR/IIR Filter With Bypassing Option · Programmable Sampli 文件：1.24218 Mbytes 页数：59 Pages | TI 德州仪器 | TI | ||
丝印：320AIC24C；Package：TQFP(PFB)；Low-Power, Highly-Integrated, Programmable 16-Bit, 26-KSPS, Dual-Channel CODEC FEATURES · Stereo 16-Bit Oversampling Sigma-Delta A/D Converter · Stereo 16-Bit Oversampling Sigma-Delta D/A Converter · Support Maximum Master Clock of 100 MHz to Allow DSPs Output Clock to be Used as a Master Clock · Selectable FIR/IIR Filter With Bypassing Option · Programmable Sampli 文件：1.24218 Mbytes 页数：59 Pages | TI 德州仪器 | TI | ||
丝印：320AIC24C；Package：TQFP(PFB)；Low-Power, Highly-Integrated, Programmable 16-Bit, 26-KSPS, Dual-Channel CODEC FEATURES · Stereo 16-Bit Oversampling Sigma-Delta A/D Converter · Stereo 16-Bit Oversampling Sigma-Delta D/A Converter · Support Maximum Master Clock of 100 MHz to Allow DSPs Output Clock to be Used as a Master Clock · Selectable FIR/IIR Filter With Bypassing Option · Programmable Sampli 文件：1.24218 Mbytes 页数：59 Pages | TI 德州仪器 | TI | ||
丝印：320AIC24C；Package：TQFP(PFB)；Low-Power, Highly-Integrated, Programmable 16-Bit, 26-KSPS, Dual-Channel CODEC FEATURES · Stereo 16-Bit Oversampling Sigma-Delta A/D Converter · Stereo 16-Bit Oversampling Sigma-Delta D/A Converter · Support Maximum Master Clock of 100 MHz to Allow DSPs Output Clock to be Used as a Master Clock · Selectable FIR/IIR Filter With Bypassing Option · Programmable Sampli 文件：1.24218 Mbytes 页数：59 Pages | TI 德州仪器 | TI | ||
丝印：320AIC24C；Package：TQFP(PFB)；Low-Power, Highly-Integrated, Programmable 16-Bit, 26-KSPS, Dual-Channel CODEC FEATURES · Stereo 16-Bit Oversampling Sigma-Delta A/D Converter · Stereo 16-Bit Oversampling Sigma-Delta D/A Converter · Support Maximum Master Clock of 100 MHz to Allow DSPs Output Clock to be Used as a Master Clock · Selectable FIR/IIR Filter With Bypassing Option · Programmable Sampli 文件：1.24218 Mbytes 页数：59 Pages | TI 德州仪器 | TI | ||
Layout and Grounding Guidelines for TLV320AIC2x 文件：983.6 Kbytes 页数：53 Pages | TI 德州仪器 | TI | ||
LOW-POWER, HIGHLY-INTEGRATED, PROGRAMMABLE 16-Bit, 26-KSPS MONO CODEC 文件：1.15972 Mbytes 页数：63 Pages | TI 德州仪器 | TI | ||
LOW-POWER, HIGHLY-INTEGRATED, PROGRAMMABLE 16-Bit, 26-KSPS MONO CODEC 文件：1.15972 Mbytes 页数：63 Pages | TI 德州仪器 | TI |
详细参数
- 型号：
TLV320AIC24C
- 功能描述：
接口—CODEC Low Power Dual Channel
- RoHS：
否
- 制造商：
Texas Instruments
- 转换速率：
48 kSPs
- 接口类型：
I2C ADC
- 数量：
2 DAC
- 数量：
4
- 工作电源电压：
1.8 V, 2.1 V, 2.3 V to 5.5 V
- 最大工作温度：
+ 85 C
- 安装风格：
SMD/SMT
- 封装/箱体：
DSBGA-81
- 封装：
Reel
| 供应商 | 型号 | 品牌 | 批号 | 封装 | 库存 | 备注 | 价格 |
|---|---|---|---|---|---|---|---|
TI |
23+ |
TQFP48 |
8000 |
原装正品,假一罚十 |
询价 | ||
TEXASINSTRU |
24+ |
原封装 |
1580 |
原装现货假一罚十 |
询价 | ||
TI |
11+ |
TQFP-48 |
8000 |
全新原装,绝对正品现货供应 |
询价 | ||
TexasInstruments |
18+ |
ICCODEC16BITDUALPROG48-T |
6800 |
公司原装现货/欢迎来电咨询! |
询价 | ||
TI |
20+ |
TQFP-48 |
500 |
样品可出,优势库存欢迎实单 |
询价 | ||
Texas Instruments |
24+ |
48-TQFP(7x7) |
35200 |
一级代理/放心采购 |
询价 | ||
TI |
23+ |
10000 |
全新原装正品现货 |
询价 | |||
TI |
25+ |
QFP-48 |
250 |
就找我吧!--邀您体验愉快问购元件! |
询价 | ||
TI(德州仪器) |
2021+ |
TQFP-48(7x7) |
499 |
询价 | |||
TI |
23+ |
N/A |
7560 |
原厂原装 |
询价 |
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