TLV320AIC20IPFB.A数据手册市场行情TI-114ic电子网

型号	下载订购	功能描述	制造商上传企业	LOGO
TLV320AIC20IPFB.A	文件：1.24218 Mbytes Page：59 Pages	丝印：320AIC20I；Package：TQFP(PFB)；Low-Power, Highly-Integrated, Programmable 16-Bit, 26-KSPS, Dual-Channel CODEC FEATURES · Stereo 16-Bit Oversampling Sigma-Delta A/D Converter · Stereo 16-Bit Oversampling Sigma-Delta D/A Converter · Support Maximum Master Clock of 100 MHz to Allow DSPs Output Clock to be Used as a Master Clock · Selectable FIR/IIR Filter With Bypassing Option · Programmable Sampli 文件：1.24218 Mbytes 页数：59 Pages	TI 德州仪器	TI
TLV320AIC20IPFBR	文件：1.15972 Mbytes Page：63 Pages	LOW-POWER, HIGHLY-INTEGRATED, PROGRAMMABLE 16-Bit, 26-KSPS MONO CODEC 文件：1.15972 Mbytes 页数：63 Pages	TI 德州仪器	TI
TLV320AIC20IPFBR	文件：983.6 Kbytes Page：53 Pages	Layout and Grounding Guidelines for TLV320AIC2x 文件：983.6 Kbytes 页数：53 Pages	TI 德州仪器	TI
TLV320AIC20IPFBR	文件：1.24218 Mbytes Page：59 Pages	Low-Power, Highly-Integrated, Programmable 16-Bit, 26-KSPS, Dual-Channel CODEC FEATURES · Stereo 16-Bit Oversampling Sigma-Delta A/D Converter · Stereo 16-Bit Oversampling Sigma-Delta D/A Converter · Support Maximum Master Clock of 100 MHz to Allow DSPs Output Clock to be Used as a Master Clock · Selectable FIR/IIR Filter With Bypassing Option · Programmable Sampli 文件：1.24218 Mbytes 页数：59 Pages	TI 德州仪器	TI

更多TLV320AIC20IPFB.A供应商更新时间2025-12-21 15:14:00