3.0-V TO 5.5-V, 12-BIT, 200-KSPS, 4-/8-CHANNEL, LOW-POWER SERIAL ANALOG-TO-DIGITAL CONVERTER WITH AUTOPOWER-DOWN

1FEATURES • Maximum Throughput 200-KSPS • Built-In Reference, Conversion Clock and 8x FIFO • Differential/Integral Nonlinearity Error: ±1.2 LSB • Signal-to-Noise and Distortion Ratio: 70 dB, f i = 12 kHz • Spurious Free Dynamic Range: 75 dB, f i = 12 kHz • SPI (CPOL = 0, CPHA = 0)/DSP-Co

文件：952.74 Kbytes 页数：39 Pages

TI

德州仪器

3.0-V TO 5.5-V, 12-BIT, 200-KSPS, 4-/8-CHANNEL, LOW-POWER SERIAL ANALOG-TO-DIGITAL CONVERTER WITH AUTOPOWER-DOWN

文件：1.11719 Mbytes 页数：38 Pages

TI

德州仪器

2.7 V TO 5.5 V, 12-BIT, 200 KSPS, 4/8 CHANNEL, LOW POWER, SERIAL ANALOG-TO-DIGITAL CONVERTERS WITH AUTO POWER DOWN

文件：1.70779 Mbytes 页数：49 Pages

TI

德州仪器

增强型产品 2 位 200kSPS ADC，具有串行输出、自动断电（软件和硬件）、低功耗、8 x FIFO 和 8 通道

The TLV2548 is a high performance, 12-bit low-power, 3.86-µs, CMOS analog-to-digital converter (ADC) which operates from a single 3.0-V to 5.5-V power supply. This device has three digital inputs and a 3-state output [chip select (CS), serial input-output clock (SCLK), serial data input (SDI), and s • Maximum Throughput 200-KSPS\n• Differential/Integral Nonlinearity Error: ±1.2 LSB\n• Spurious Free Dynamic Range: 75 dB, fi = 12 kHz\n• Single Wide Range Supply 3.0 Vdc to 5.5 Vdc\n• Hardware Controlled and Programmable Sampling Period\n• Power Down: Software/Hardware Power-Down Mode (1 µA Max, Ex;

TI

德州仪器